Lateral MOS Transistor with Segmented Field and Gate Trenches
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Solution Overview
Problem
MOS power transistors in automotive and industrial electronics face challenges in achieving low on-state resistance (Ron) and high breakdown voltage, with existing lateral MOS transistors having limitations in reducing Ron and parasitic capacitances.
Innovation Solution
The method involves forming field plate trenches and gate trenches in a semiconductor substrate, with a conductive material in these trenches, and a dielectric layer, to create a transistor structure that includes a source, drain, and channel region, allowing for improved charge depletion and reduced Ron.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lateral MOS transistors with drain extension region or resurf concept are used, then breakdown voltage is improved, but on-state resistance cannot be sufficiently reduced
Solution Approach 1:
The transistor structure is segmented into distinct regions: a first transistor with channel formed in the drift zone, and a second transistor with channel formed in an epitaxial layer on top of the drift zone. This segmentation allows each transistor to contribute differently to the overall device performance, with the first transistor providing breakdown voltage and the second transistor providing low on-state resistance.
Solution Approach 2:
Different regions of the device are given different doping concentrations and structural characteristics optimized for their specific functions. The drift zone has doping optimized for breakdown voltage, while the epitaxial layer has doping optimized for low resistance conduction. This local optimization resolves the contradiction between high breakdown voltage and low on-state resistance.
2Ease of manufacture
If conventional lateral MOS transistor structure is used, then manufacturing is simplified, but parasitic capacitances cannot be sufficiently reduced
Solution Approach 1:
The patent introduces a vertical dimension by forming an epitaxial layer on top of the drift zone, creating a three-dimensional structure. This dimensional change allows for reduced parasitic capacitances by separating charge storage regions while maintaining a planar manufacturing process, thus resolving the contradiction between manufacturing simplicity and parasitic capacitance reduction.
Data Source
AI summary
A method of manufacturing a semiconductor device including a transistor comprises forming field plate trenches in a main surface of a semiconductor substrate, a drift zone being defined between adjacent field plate trenches, forming a field dielectric layer in the field plate trenches, thereafter, forming gate trenches in the main surface of the semiconductor substrate, a channel region being defined between adjacent gate trenches, and forming a conductive material in at least some of the field plate trenches and in at least some of the gate trenches. The method further comprising forming a source region and forming a drain region in the main surface of the semiconductor substrate.