Lateral MOSFET Asymmetric Doping for Breakdown Voltage
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Solution Overview
Problem
As semiconductor devices are scaled down, maintaining low on-resistance and high breakdown voltage in transistors becomes challenging, particularly in high power applications, where existing MOSFET technologies face limitations in integration density and performance.
Innovation Solution
The development of a lateral diffused metal oxide semiconductor (LDMOS) transistor with a unique asymmetric structure and specific doping processes, including the formation of high voltage and low voltage wells, isolation regions, and a gate electrode layer with a recessed design, enhances current density and prevents shorting, thereby achieving improved breakdown voltage and reduced on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor is scaled down to improve integration density, then integration density is improved, but on-resistance increases and breakdown voltage decreases
Solution Approach 1:
The patent transitions from a vertical transistor structure to a lateral structure, changing the dimensional orientation of current flow. The source and drain are positioned laterally adjacent to each other with the gate controlling current flow horizontally across the channel, rather than vertically through stacked regions. This dimensional change allows maintaining low on-resistance while achieving high integration density through planar scaling.
Solution Approach 2:
The patent employs an asymmetric structure with a lightly-doped extension region adjacent to the source and a heavily-doped drain region. This asymmetric doping configuration creates a lateral field effect that extends the effective channel length without increasing the physical distance between source and drain, thereby maintaining low on-resistance while preventing premature breakdown and enabling higher breakdown voltage in scaled devices.
2Ease of manufacture
If conventional MOSFET structures are used, then manufacturing process is simple, but current density is limited
Solution Approach 1:
The patent applies different doping concentrations to different regions: a lightly-doped extension region adjacent to the source and a heavily-doped drain region. This local differentiation of doping quality enables high current density by creating a strong electric field in the drain region while maintaining a controlled depletion region. The selective doping approach achieves enhanced current handling capability using standard semiconductor fabrication techniques.
3Ease of manufacture
If symmetric structure is used, then fabrication is easier, but breakdown voltage is limited
Solution Approach 1:
The patent deliberately introduces asymmetry with a lightly-doped extension region and a heavily-doped drain region. This asymmetric configuration creates a lateral field effect that extends the depletion region width under reverse bias, thereby increasing breakdown voltage. The asymmetric doping profile allows the device to withstand higher voltages while remaining compatible with standard CMOS fabrication processes.
Data Source
AI summary
A method includes forming a first isolation region in a substrate, wherein a top surface of the first isolation region is lower than a top surface of the substrate, depositing a gate electrode layer over the substrate and patterning the gate electrode layer to form a first gate electrode region and a second gate electrode region, wherein the second gate electrode region is vertically aligned with the first isolation region and the first gate electrode region is immediately adjacent to the second gate electrode region.