Lateral Patterning of 3D Semiconductor Pattern Elements
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Solution Overview
Problem
Current methods for patterning three-dimensional nano- and micropatterns are challenging due to increased topology, often resulting in undesirable patterns, material transfer to underlying layers, and limited material removal, which complicates device production and reduces flexibility.
Innovation Solution
A method for lateral patterning of three-dimensional pattern elements using a covering layer that applies force to break off pattern elements, allowing for partial or complete removal without decomposing the material, using techniques like mechanical wiping, ultrasound, or thermal changes, which reduces damage and enhances production flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If planarization methods are used to minimize topological influences, then the topology is overfilled and filler material is etched back, but this leaves undesirable absorbing patterns behind and is only practicable for small topological differences
Solution Approach 1:
The invention extracts and removes the filler material that causes harmful absorbing patterns through selective etching. The method etches back the overfilled topology minimizer material to retrieve the original pattern contours, removing the harmful absorbing patterns while preserving the desired three-dimensional pattern structure.
2Ease of manufacture
If back sputtering or dry or wet chemical etching is used to remove material, then patterning can be performed, but the morphology of the pattern to be removed is often undesirably transferred at least in part into the underlying layers
Solution Approach 1:
The invention uses a sacrificial topology minimizer layer that is designed to be removed after serving its purpose. This disposable layer allows patterning to be performed easily while preventing morphology transfer to underlying layers, as the sacrificial material is completely removed after enabling the patterning process.
3Productivity
If three-dimensional patterns are produced in a selective growth process, then the need for patterning is bypassed, but this reduces production flexibility since subsequent device sizes or types are predetermined at the point of growth
Solution Approach 1:
The invention segments the production process into distinct stages: first growing the three-dimensional patterns in a selective growth process, then applying a topology minimizer layer, and finally performing lateral patterning. This segmentation allows the growth process to be optimized for efficiency while the subsequent patterning step provides the necessary flexibility for different device sizes and types.
4Ease of manufacture
If wet chemical methods are used for material removal, then patterning can be performed, but these methods are limited with regard to the removable material and the maximum quantity of material that can be removed
Solution Approach 1:
The invention changes the parameters of the removal process by using a topology minimizer layer with specific material properties that enable removal of large quantities of material. The layer is designed with controlled thickness and material composition that allows extensive material removal while maintaining pattern integrity, overcoming the limitations of conventional wet chemical methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables reliable and efficient lateral patterning with minimal damage to the semiconductor device, reducing radiation absorption risks and increasing usable area for radiation generation, while avoiding the limitations of chemical etching and improving production efficiency.
Implementation Method 1
The region to be removed of the pattern layer is removed by means of a force acting on the pattern elements in the region to be removed
Implementation Method 2
mechanical wiping
Implementation Method 3
ultrasound
Implementation Method 4
The pattern elements are thus removed in that they are exposed to a force in the region to be removed which leads to breaking off of the pattern elements
Implementation Method 5
thermal changes
Data Source
AI summary
The invention relates to a method for laterally structuring a structured layer (2) with a plurality of three-dimensional structure elements (20), having the following steps: a) providing the structured layer with the three-dimensional structure elements; b) forming a laterally structured covering layer (3) on the structured layer in order to define at least one structured layer region (4) to be removed; and c) removing the structured layer region to be removed by means of a force acting on the structure elements in the region to be removed. The invention further relates to a semiconductor component (1).