Lateral Plating Semiconductor Interconnections
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Solution Overview
Problem
Conventional semiconductor manufacturing processes are time-consuming and costly, resulting in unreliable connections and suboptimal interconnection structures in semiconductor packages.
Innovation Solution
A method of manufacturing semiconductor devices involving the formation of interconnection structures through a lateral plating process, which includes forming seed layers, patterning, etching, and plating metal pillars with an interior cavity, to enhance connection reliability and structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor manufacturing processes are used, then manufacturing experience is accumulated, but manufacturing time is excessive and costs are high
Solution Approach 1:
The patent applies preliminary action by forming the seed layer pattern and cavity structure before the actual metal plating process. The seed layer is deposited and patterned in advance, and cavities are formed beforehand, allowing the subsequent plating process to proceed more efficiently and reliably without time-consuming intermediate steps.
Solution Approach 2:
The manufacturing process is segmented into distinct stages: seed layer formation, cavity formation, and metal plating. This segmentation allows each process to be optimized independently and reduces the cumulative time of sequential operations while maintaining connection reliability through controlled process steps.
2Reliability
If conventional manufacturing processes are used, then standard procedures are followed, but manufacturing costs are excessive
Solution Approach 1:
The patent changes key process parameters by using lateral plating geometry instead of conventional vertical plating, and by controlling cavity dimensions and seed layer thickness. These parameter changes enable more efficient material deposition and reduced manufacturing steps, lowering costs while maintaining or improving connection reliability.
3Manufacturing precision
If conventional processes are used, then existing methods are maintained, but interconnection structures have suboptimal dimensions
Solution Approach 1:
The patent transitions from conventional vertical plating to lateral plating geometry, fundamentally changing the dimensional approach to interconnection structure formation. This dimensional change enables precise control over width, depth, and cross-sectional shape of interconnection structures, achieving superior manufacturing precision despite increased process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time and costs while improving the reliability and dimensions of semiconductor package connections, leading to more efficient and effective semiconductor devices.
Implementation Method 1
forming interconnection structures by at least part performing a lateral plating process
Data Source
AI summary
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing a semiconductor device comprising forming interconnection structures by at least part performing a lateral plating process, and a semiconductor device manufactured thereby.