Lateral Programmable Impedance Memory Elements
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Solution Overview
Problem
Conventional conductive bridging random access memory (CBRAM) devices face mechanical stress due to thermal expansion differences and unconstrained movement of anode material, leading to reliability issues.
Innovation Solution
A memory element with a lateral structure, featuring a centralized first electrode surrounded by a memory material and a second electrode, where the second electrode completely surrounds the ion conductor, providing uniform electric field control and confining mobile ions to prevent migration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional vertical stack memory element structure is used, then the device can be manufactured with standard processes, but mechanical stress arises during temperature changes due to thermal expansion differences between the anode and other circuit sections
Solution Approach 1:
The patent transitions from a conventional vertical stack configuration to a lateral configuration where the first and second electrodes are positioned horizontally adjacent to each other within the same plane. This dimensional reorganization redistributes thermal expansion stresses laterally rather than vertically, reducing mechanical stress concentration during temperature changes while maintaining compatibility with standard semiconductor manufacturing processes.
2Device complexity
If a conventional vertical stack memory element structure is used, then the device structure is simple, but the anode material moves unconstrained upon dissolution of filaments, leading to reliability issues
Solution Approach 1:
The patent introduces a confinement structure that selectively constrains the anode material in the lateral direction while maintaining the simplicity of the overall device structure. This localized constraint mechanism prevents unconstrained movement of anode atoms during filament dissolution and regrowth, ensuring reliable data storage without significantly increasing device complexity.
3Ease of operation
If a conventional vertical stack memory element structure is used, then the electric field application is straightforward, but the field distribution is non-uniform, affecting ion migration control
Solution Approach 1:
The patent employs asymmetric electrode positioning and confinement structure design to achieve uniform electric field distribution. The first electrode is positioned adjacent to the second electrode with a specific asymmetric arrangement that, combined with the confinement structure, creates a more uniform electric field across the ion conductor interface, improving control over ion migration while maintaining ease of operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces mechanical stress and ensures reliable data storage by maintaining uniform electric field application and ion confinement, enhancing the stability and reliability of the memory device.
Implementation Method 1
By application of a bias voltage across anode 1807 and cathode 1803, a metal within anode 1807 can ion conduct within layer 1805 to thereby create (or dissolve) a conductive path
Implementation Method 2
there can be a substantial difference between the thermal coefficient of expansion of the anode 1807 (i.e., silver) and other section of an integrated circuit (i.e., silicon). Accordingly, changes in temperature can impart mechanical stress on the device
Data Source
AI summary
A memory device can include a plurality of memory elements formed over a substrate, including a plurality of first electrodes, each having a top surface and opposing side surfaces, a plurality of second electrodes formed on different vertical levels, each aligned with a corresponding first electrode in a lateral direction, and a memory material formed between each first electrode and an adjacent second electrode, the memory material being in contact with the opposing side surfaces of each first electrode and not in contact with the top surface of the first electrodes; wherein the memory material is electrically programmable between at least two different resistance states, and the lateral direction is parallel to a top surface of the substrate.