Lateral Semiconductor Block Stacking for Heat Dissipation
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Solution Overview
Problem
The challenge in semiconductor packaging is to increase the number of semiconductor chips within a limited space constraint, as existing technologies face difficulties in efficiently arranging and dissipating heat in vertically stacked configurations, which limits the number of chips that can be integrated.
Innovation Solution
The solution involves laterally stacking semiconductor blocks with heat dissipation plates and redistribution structures, allowing for the integration of multiple semiconductor chips in a horizontal direction without the need for costly through-silicon vias or bonding wires, and using a molding member to protect the chips while exposing heat dissipation plates for efficient thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically stacked configuration is used, then the number of semiconductor chips can be increased, but heat dissipation becomes difficult and space constraint remains limited
Solution Approach 1:
The patent transitions from vertical stacking to lateral stacking of semiconductor blocks, changing the spatial arrangement from the vertical dimension to the horizontal dimension. This allows multiple blocks to be arranged side by side on the redistribution structure, increasing chip capacity while improving heat dissipation pathways to the heat dissipation plate.
Solution Approach 2:
The patent divides the semiconductor package into multiple separate blocks, each containing laterally stacked semiconductor chips. These blocks are arranged laterally on the redistribution structure, with heat dissipation plates positioned between them. This segmentation allows independent heat management for each block while maximizing space utilization.
2Reliability
If through-silicon vias or bonding wires are used for connecting chips, then electrical connection is achieved, but manufacturing cost increases
Solution Approach 1:
The patent eliminates the need for through-silicon vias and bonding wires by directly mounting semiconductor blocks onto the redistribution structure. The electrical connections are established through direct contact between the blocks and the redistribution structure, removing complex and costly interconnection methods while maintaining reliable electrical connectivity.
3Reliability
If molding member covers all semiconductor chips, then protection is provided, but heat dissipation is hindered
Solution Approach 1:
The patent applies selective coverage by the molding member, which covers only specific regions of the semiconductor blocks while leaving the heat dissipation plates exposed. This localized approach provides protection where needed while maintaining thermal pathways for efficient heat dissipation from the semiconductor chips to the heat dissipation plate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the integration of a higher number of semiconductor chips, improving memory capacity, manufacturing efficiency, and reducing power consumption, while effectively addressing heat dissipation issues, allowing for more functional and compact semiconductor packages.
Implementation Method 1
each semiconductor block among the laterally stacked semiconductor blocks includes laterally stacked semiconductor chips, a heat dissipation plate, and a first molding member on the laterally stacked semiconductor chips
Data Source
AI summary
A semiconductor package includes; laterally stacked semiconductor blocks disposed side by side in a first horizontal direction on a redistribution structure, wherein each semiconductor block among the laterally stacked semiconductor blocks includes laterally stacked semiconductor chips, a heat dissipation plate, and a first molding member on the laterally stacked semiconductor chips.