Lateral Super-Junction Power Device with Asymmetric Trenches
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Solution Overview
Problem
Conventional semiconductor power devices with super-junction structures face manufacturability difficulties and high costs due to complex and time-consuming manufacturing processes, particularly in achieving high-density alternately doped columns, which affect on-resistance and breakdown voltage performance.
Innovation Solution
A lateral super-junction structure is implemented with a P-epitaxial layer over an N substrate, featuring deep N+ source and drain columns and a P+ gate column, along with an N+-P-P+ gate-drain avalanche clamp diode, to enhance current spreading and breakdown voltage, and integrating a low voltage MOSFET for normally-off operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical super-junction structures with high-density alternately doped columns are implemented, then on-resistance is reduced and breakdown voltage is improved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The device is segmented into distinct functional regions: a drift region with alternately doped columns for voltage blocking, and a separate super-junction region for current conduction. This segmentation allows each region to be optimized independently, reducing overall manufacturing complexity while maintaining high breakdown voltage and low on-resistance
Solution Approach 2:
The invention transitions from a conventional vertical current flow path to a lateral current path through the super-junction region. By changing the current direction to flow laterally between source and drain columns, the device achieves low on-resistance without requiring high-density vertical doped columns, thereby simplifying the manufacturing process
2Manufacturing precision
If the number of masking, implantation and epitaxial growth steps is increased to achieve high-density alternately doped columns, then manufacturing precision is improved, but productivity decreases and cost increases
Solution Approach 1:
The invention extracts the charge-balancing function from the main current-conduction path by placing alternately doped columns specifically in the drift region. This separation allows the super-junction region to focus on low-resistance current flow while the drift region handles voltage blocking, reducing the number of processing steps needed in the critical current path
Solution Approach 2:
The drift region with alternately doped columns is formed preliminarily to establish the voltage-blocking capability before forming the super-junction region. This preliminary action ensures that the charge-balanced structure is in place to support the subsequent super-junction formation, reducing the need for corrective processing steps
3Reliability
If deep drain trenches are formed to separate drain terminal to substrate plane, then current spreading is improved and breakdown voltage increases, but manufacturing complexity increases
Solution Approach 1:
The device employs asymmetric trench depths: deep drain trenches extend to the substrate to enable current spreading and achieve high substrate blocking voltage, while source and gate trenches have moderate depths. This asymmetric design optimizes each terminal's function without requiring uniformly deep trenches throughout the device, balancing manufacturing complexity with performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves manufacturability, reduces on-resistance, and increases breakdown voltage while providing a rugged high-voltage diode that diverts avalanche current, enhancing the robustness and performance of the power device.
Implementation Method 1
a P-epitaxial layer functioning as an intermediate semiconductor layer over an N substrate constituting a bottom semiconductor layer
Implementation Method 2
stacked horizontal layers of alternating dopant conductivity types
Implementation Method 3
an N+-P-P+ gate-drain avalanche clamp diode is formed from the N+ drain substrate to the P-epitaxial to the P+ gate column to provide a rugged high voltage diode that diverts the avalanche current away from the superjunction layers
Data Source
AI summary
A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.