Lateral Superjunction MOS Transistor With Deep RESURF Trenches
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Solution Overview
Problem
Integrated circuits with lateral extended drain MOS transistors face challenges in reducing the area required for achieving desired series resistance and operating drain voltage, as existing designs do not effectively minimize drain-source resistance.
Innovation Solution
Incorporating deep semiconductor RESURF trenches in the drift region of the MOS transistor, filled with semiconductor RESURF material of opposite conductivity type, which reduces electric field and enhances resistance characteristics, with trenches having a depth:width ratio of at least 5:1 and doping levels between 5×10^15 cm^-3 and 1×10^18 cm^-3.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the area of the extended drain MOS transistor is reduced, then the integration density is improved, but the drain-source resistance increases
Solution Approach 1:
The drift region is segmented into multiple regions by introducing deep RESURF trenches that divide the continuous drift region into separated zones. This segmentation creates multiple parallel conduction paths while maintaining the overall low resistance requirement, allowing the transistor to achieve desired drain-source resistance in a reduced area.
Solution Approach 2:
The RESURF trenches are strategically positioned at specific locations within the drift region where they provide localized electric field management. The trenches have different depths and doping characteristics in different regions, creating local quality variations that optimize both resistance characteristics and voltage handling in specific areas of the transistor.
2Reliability
If deep RESURF trenches are introduced, then the drain-source resistance is reduced, but the device complexity increases
Solution Approach 1:
The invention transitions from two-dimensional planar structures to three-dimensional deep trenches by extending the RESURF concept vertically into the drift region. These deep trenches create a third dimension for electric field management, allowing better control of resistance characteristics without significantly increasing planar footprint or overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of deep semiconductor RESURF trenches in the MOS transistor significantly lowers drain-source resistance compared to equivalent area MOS transistors without these features, optimizing the performance of the integrated circuit.
Implementation Method 1
the semiconductor RESURF material has an opposite conductivity type from the drift region... reduces electric field and enhances resistance characteristics
Data Source
AI summary
An integrated circuit containing an extended drain MOS transistor with deep semiconductor (SC) RESURF trenches in the drift region, in which each deep SC RESURF trench has a semiconductor RESURF layer at a sidewall of the trench contacting the drift region. The semiconductor RESURF layer has an opposite conductivity type from the drift region. The deep SC RESURF trenches have depth:width ratios of at least 5:1, and do not extend through a bottom surface of the drift region. A process of forming an integrated circuit with deep SC RESURF trenches in the drift region by etching undersized trenches and counterdoping the sidewall region to form the semiconductor RESURF layer. A process of forming an integrated circuit with deep SC RESURF trenches in the drift region by etching trenches and growing an epitaxial layer on the sidewall region to form the semiconductor RESURF layer.