Lateral and Vertical IGFET Trench Structures for Process Variation Control
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Solution Overview
Problem
Existing semiconductor technologies face challenges in reducing process variation and complexity, particularly when integrating NMOSFETs into analog circuits, which affects the performance and reliability of power switches with sensor and protection functions.
Innovation Solution
The semiconductor device incorporates both lateral and vertical IGFETs with specific trench structures and insulating zones to control current flow and reduce process variation, featuring trenches with gate dielectrics and electrodes to manage channel zones effectively, allowing for improved integration and reduced complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If NMOSFETs are integrated into analog circuits to realize current sources, then circuit functionality is improved, but process variation and process complexity increase
Solution Approach 1:
The patent segments the semiconductor device into distinct lateral IGFET and vertical IGFET structures with separate trench configurations. The lateral IGFET uses trenches extending from the first surface to define channel zones, while the vertical IGFET uses trenches extending through the semiconductor body to define body zones. This segmentation allows independent optimization of each transistor type's manufacturing process, reducing overall process variation.
Solution Approach 2:
The patent transitions from conventional planar transistor structures to three-dimensional trench-based structures. The lateral IGFET employs trenches that extend horizontally to confine channel zones laterally, while the vertical IGFET uses trenches extending vertically through the substrate. This dimensional change enables better control over charge carrier distribution and reduces sensitivity to process variations in thin-film fabrication.
2Adaptability or versatility
If NMOSFETs are integrated into analog circuits, then current source functionality is achieved, but device complexity increases
Solution Approach 1:
The patent merges lateral and vertical IGFET structures into a single semiconductor device, sharing common elements such as the semiconductor body, trench formation processes, and gate electrode fabrication. Both transistor types utilize similar materials and manufacturing steps, consolidating the device architecture rather than requiring separate integrated circuits for each transistor type.
Solution Approach 2:
The trench structure serves multiple functions simultaneously: it acts as an isolation structure, defines the channel or body zone, provides mechanical support, and facilitates gate electrode placement. The gate dielectric lining the trench walls provides both electrical insulation and a defined interface for charge carrier control. This multi-functionality reduces the number of separate components needed, simplifying the overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the control over charge carrier distribution and reduces process variation, leading to improved performance and reliability of semiconductor devices by simplifying the manufacturing process and integrating NMOSFETs effectively within analog circuits.
Implementation Method 1
The first trenches comprise a gate dielectric lining the side walls thereof and a gate electrode adjoining the gate dielectric
Data Source
AI summary
A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface, first trenches and second trenches extending from the first surface into the semiconductor body, at least one lateral IGFET including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches, and at least one vertical IGFET including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches. The first trenches extend from the first surface into the semiconductor body deeper than a channel zone of the lateral IGFET and confine the channel zone.