Laterally Spaced Interconnect Substrates for Compact MEMS IC Packaging
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Solution Overview
Problem
Conventional IC packaging methods result in bulky designs that hinder the integration of multiple MEMS ICs in electronic devices, particularly in applications where a low profile and high integration are essential, such as in mobile cellular devices.
Innovation Solution
The electronic device features laterally spaced interconnect substrates with a slotted opening, where MEMS ICs are positioned and electrically coupled, with encapsulation material filling open spaces, and bond wires or solder bodies connecting the ICs, allowing for a thinner and more flexible package structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional IC packaging methods are used, then ICs are physically protected and electrically coupled, but the package thickness increases and multiple MEMS ICs cannot be integrated
Solution Approach 1:
The patent transitions from a conventional single-substrate vertical stacking approach to a laterally spaced multi-substrate configuration. Multiple interconnect substrates are positioned side-by-side with ICs distributed across them, utilizing lateral spatial arrangement instead of vertical accumulation. This dimensional reorganization enables multiple MEMS ICs to be integrated while reducing overall package thickness.
Solution Approach 2:
The packaging structure is divided into multiple separate interconnect substrates rather than using a single monolithic substrate. Each substrate can independently support ICs and provide electrical connections, allowing the system to be segmented into functional modules that can be laterally arranged to achieve both thinness and high integration.
2Volume of moving object
If multiple MEMS ICs are integrated in a compact space, then device thickness is reduced, but assembly complexity and damage risk increase
Solution Approach 1:
Interconnect substrates are pre-configured with conductive traces and contact pads before IC mounting. This preliminary preparation of electrical pathways simplifies the subsequent assembly process, as ICs can be directly positioned and connected without complex routing operations. The substrates serve as pre-fabricated connection platforms that reduce assembly complexity.
Solution Approach 2:
Interconnect substrates act as intermediary elements between the ICs and the external environment. These substrates provide standardized connection interfaces and mechanical support, mediating the complex interactions between multiple ICs and simplifying the overall assembly process. The substrates serve as buffer layers that isolate and manage the complexity of multi-IC integration.
3Volume of moving object
If laterally spaced interconnect substrates are used, then package thickness is reduced, but electrical coupling between ICs becomes more challenging
Solution Approach 1:
Multiple interconnect substrates are electrically merged through conductive elements that span across the lateral gaps between substrates. This merging creates a unified electrical network that maintains reliable signal and power distribution across all laterally spaced substrates. The electrical coupling is achieved by combining the substrate networks through shared conductive pathways.
Solution Approach 2:
The interconnect substrates are designed with universal electrical connection capabilities that can accommodate multiple IC types and configurations. The substrates provide multi-functional interfaces that handle both electrical coupling and mechanical support functions, ensuring reliable electrical connections regardless of the specific IC arrangement or lateral spacing configuration.
Data Source
AI summary
An electronic device may include first and second laterally spaced apart interconnect substrates defining a slotted opening, and a first IC in the slotted opening and electrically coupled to one or more of the first and second interconnect substrates. The electronic device may include a first other IC over the first IC and electrically coupled to one or more of the first and second interconnect substrates, and encapsulation material over the first and second interconnect substrates, the first IC, and the first other IC.