Latin Square Fat Tree Network Topology for All-Reduce Communication

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Solution Overview

Problem

In parallel computers, the efficiency of all-reduce communication is hindered by route contention, where multiple packets are transmitted in the same direction, leading to increased communication time, and existing network topologies like the general tree structure require more switches, increasing construction costs.

Innovation Solution

A Latin square fat tree network topology with a management apparatus that extracts rows and columns from a finite projective plane to optimize the connection of leaf switches and servers, allowing for efficient all-reduce communication by specifying the execution of all-reduce operations among a predetermined number of information processing apparatuses connected to these switches, thereby avoiding route contention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a general tree structure is used to connect servers and switches, then the network can be constructed, but the number of switches increases leading to higher construction costs

Engineering Contradiction:
Improveconstruction costVSAvoidnumber of switches
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent transitions from a traditional two-stage fat tree topology to a three-stage topology by introducing an intermediate aggregation layer between leaf switches and spine switches. This dimensional change in network architecture allows for more efficient server connections with reduced switch requirements, directly addressing the contradiction between construction cost and network capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple packets are transmitted in the same direction simultaneously, then communication throughput increases, but route contention occurs leading to increased communication time

Engineering Contradiction:
Improvecommunication throughputVSAvoidcommunication time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the network into distinct layers (leaf switches, aggregation switches, spine switches) with dedicated uplink ports for each segment. This segmentation allows simultaneous packet transmissions in different segments without interference, eliminating route contention while maintaining high throughput. The aggregation layer specifically divides traffic flows to prevent conflicts on single transmission paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By introducing the aggregation switch layer, the patent creates additional transmission dimensions and paths. Packets can be routed through multiple aggregation switches simultaneously, transforming single-path bottlenecks into multi-dimensional parallel transmission channels, thereby increasing throughput without causing route contention.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If more switches are added to the network, then network coverage and connectivity improve, but construction costs increase

Engineering Contradiction:
Improvenetwork coverageVSAvoidconstruction cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The aggregation switches serve multiple functions: they act as connection points for leaf switches, provide additional routing paths, and enable aggregation of traffic before transmission to spine switches. This multi-functionality allows the network to achieve broader coverage and better connectivity without proportionally increasing the number of switches, thereby controlling construction costs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10594626B2Information processing system and management apparatus
Publication Date: 2020.03.17 FUJITSU LTD
  • US10594626B2 patent drawing
  • US10594626B2 patent drawing
  • US10594626B2 patent drawing

AI summary

An information processing system includes leaf switches connected in a form of a Latin square fat tree, information processing apparatuses connected to any one of the leaf switches, respectively, and a management apparatus including a first processor. The first processor extracts one or more rows and one or more columns from a lattice portion other than an infinite original point of a finite projection plane corresponding to the Latin square fat tree. The first processor specifies leaf switches corresponding to points included in the extracted one or more rows and included in the extracted one or more columns. The first processor transmits an instruction to execute an all-reduce communication, in which a result of the communication is shared by all members that execute the communication, to a predetermined number of information processing apparatuses among the information processing apparatuses connected to the specified leaf switches.