Latin Square Fat Tree Topology for Parallel Network Switch Reduction
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Solution Overview
Problem
In parallel distributed processing systems, all-to-all communication among nodes leads to increased costs and decreased efficiency due to high switch requirements and path contention, necessitating a more efficient topological structure for connecting nodes.
Innovation Solution
A parallel information processing apparatus utilizing a Latin square fat tree topology with a finite projective plane structure, where nodes are connected through a lattice structure, allowing for part-to-part communication by designating blocks and generating communication protocols with different slopes to prevent path contention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all-to-all communication is executed for all nodes in a parallel distributed process, then communication completeness is improved, but cost increases and efficiency decreases
Solution Approach 1:
The patent segments the node set into multiple groups and divides communication into stages, where nodes communicate with selected representative nodes from other groups rather than all nodes. This segmentation reduces the communication footprint and switches required while maintaining essential communication functionality.
Solution Approach 2:
Instead of executing complete all-to-all communication among all nodes, the patent implements partial communication by selecting representative nodes from each group to serve as communication intermediaries. This partial action approach reduces the number of active communication paths and switches needed.
2Reliability
If all-to-all communication is executed for all nodes, then communication completeness is improved, but path contention increases
Solution Approach 1:
By segmenting nodes into groups and using representative nodes as intermediaries, the patent creates distinct communication paths that reduce overlap and contention. Different groups communicate through different representative nodes, distributing the communication load and reducing path contention.
Solution Approach 2:
The patent introduces representative nodes from each group as intermediaries that facilitate communication between groups. These intermediaries act as buffers that coordinate communication timing and paths, reducing direct path contention between nodes.
3Ease of manufacture
If a traditional topology is used to connect nodes, then ease of implementation is improved, but cost and efficiency decrease
Solution Approach 1:
The patent divides the network into groups with designated representative nodes, creating a modular topology that is easier to implement and manage. Each group operates semi-independently with clear communication protocols, simplifying implementation while improving efficiency.
Solution Approach 2:
The representative nodes serve multiple functions: they act as communication intermediaries, coordinate group communications, and manage routing decisions. This multi-functionality reduces the need for specialized infrastructure and simplifies the overall topology implementation.
Data Source
AI summary
A parallel information processing apparatus includes a group of switches configured to have a topology of a Latin square, and nodes connected with a switch among the group of switches. The parallel information processing apparatus also include a memory and a processor configured to designate (n×k) units of blocks in the group of switches included in a lattice structure in the topology of the Latin square; to generate information about communication protocol that includes communication directions having different slopes for m (m≤k) units of the nodes, and the number of hops set for the respective communication directions having the different slopes; and to execute communication for the m units of the nodes of the units of the block, based on the information about communication protocol, so as to execute part-to-part communication between the m units of the nodes of the respective units of the blocks.