Lattice Memory Node Routing via Address Comparison

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Solution Overview

Problem

In storage devices with forwarding-function-equipped memory nodes, updating routing tables becomes cumbersome and computationally expensive when adding or removing nodes, leading to increased data forwarding wait times and reduced expandability.

Innovation Solution

A storage device configuration where memory nodes are connected in a lattice structure, using a forwarding algorithm that determines the next hop based on the distance between nodes to minimize packet forwarding steps, eliminating the need for explicit routing table management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If routing table management is used to forward packets between memory nodes, then data can be properly routed to destination nodes, but the system becomes complex and computationally expensive when adding or removing nodes

Engineering Contradiction:
Improvepacket routing accuracyVSAvoidrouting table management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the routing table management function from each memory node and replaces it with a simplified forwarding mechanism based on physical node addresses. Instead of maintaining complex routing tables, each node simply forwards packets to adjacent nodes based on address comparison, eliminating the need for centralized routing management while maintaining reliable packet delivery.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Each memory node autonomously determines the next hop for packet forwarding by comparing its own physical address with the destination address. This self-service mechanism eliminates the need for external routing table updates when nodes are added or removed, as each node independently adapts to network changes through address-based forwarding decisions.

Inventive Principle:
Principle #25Self-service

2Reliability

If routing tables are updated when memory nodes are added or removed, then the network maintains proper routing information, but computational cost and processing time increase significantly

Engineering Contradiction:
Improverouting information accuracyVSAvoidrouting table update time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system eliminates centralized routing table updates by enabling each memory node to autonomously determine forwarding paths through address comparison. When nodes are added or removed, the network automatically adapts without requiring computational resources for routing table recalculation, as each node independently makes forwarding decisions based on current address information.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent establishes address-based forwarding rules in advance, where each node is pre-configured with its physical address and forwarding logic. This preliminary setup eliminates the need for dynamic routing table updates, as the forwarding mechanism is already optimized to handle network changes without additional computational overhead.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If the number of memory nodes is significantly increased to expand capacity, then storage capability improves, but routing table management becomes prohibitively expensive

Engineering Contradiction:
Improvestorage capacityVSAvoidcomputational cost for routing management
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent removes the computationally intensive routing table management function from scalable memory node systems, replacing it with a lightweight address-based forwarding mechanism. This extraction enables linear scaling of storage capacity without the quadratic growth of routing management complexity that would otherwise occur in traditional routed networks.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system changes the forwarding parameter from complex routing table lookups to simple physical address comparisons. This parameter change reduces the computational complexity from O(N) or O(N log N) routing table searches to O(1) address-based decisions, enabling efficient scaling to large numbers of memory nodes with minimal energy consumption.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If data packets are forwarded through multiple memory nodes, then routing flexibility is achieved, but forwarding wait time increases

Engineering Contradiction:
Improverouting flexibilityVSAvoiddata forwarding wait time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

Instead of using logical routing tables that require multiple lookup steps, the patent inverts the approach by using physical address-based direct forwarding. This inversion reduces the number of forwarding hops and wait times while maintaining routing flexibility, as each node can directly determine the next hop through address comparison without iterative routing table searches.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS10397139B2Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method
Publication Date: 2019.08.27 KIOXIA CORP
  • US10397139B2 patent drawing
  • US10397139B2 patent drawing
  • US10397139B2 patent drawing

AI summary

According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.