Lattice Wave Filter Topology for Low-Power Sample Rate Conversion
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Solution Overview
Problem
Conventional sample rate conversion systems face challenges in reducing power consumption, silicon area, and latency, particularly in adaptive noise cancellation systems where efficient sample rate conversion is crucial for noise cancellation and high-quality audio processing.
Innovation Solution
The implementation of low power lattice wave filters, which utilize a multistage topology with registers between stages to reduce ripple power and arithmetic operations, enabling efficient coefficient changes and lower silicon footprint, while maintaining compatibility with existing structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional sample rate conversion structures are used, then sample rate conversion can be performed, but power consumption is high
Solution Approach 1:
The filter is divided into multiple cascaded stages, each performing partial sample rate conversion. This segmentation allows the system to achieve the overall conversion ratio through multiple smaller steps, reducing the computational burden and power consumption of each individual stage while maintaining the total conversion capability.
Solution Approach 2:
The lattice wave filter uses dynamic coefficient adjustment to adapt to different sample rate conversion requirements. By dynamically changing the filter coefficients based on the desired conversion ratio, the system can efficiently handle various conversion scenarios without requiring multiple dedicated hardware structures, thereby reducing overall power consumption.
2Area of stationary object
If conventional sample rate conversion structures are used, then sample rate conversion can be performed, but silicon area is large
Solution Approach 1:
The lattice wave filter structure serves multiple functions: it performs both filtering and sample rate conversion operations in a single unified structure. The same filter stages are used for both anti-aliasing filtering and decimation, eliminating the need for separate filtering and conversion hardware, thus reducing silicon area while maintaining full conversion capability.
Solution Approach 2:
The multistage lattice wave filter implements a nested structure where each stage contains delay elements and adders that are reused across stages. The delay elements in earlier stages feed into subsequent stages, creating a nested architecture where hardware resources are shared and reused, minimizing the total silicon footprint required for the complete sample rate conversion function.
3Loss of time
If conventional sample rate conversion structures are used, then sample rate conversion can be performed, but delay is high
Solution Approach 1:
By segmenting the conversion into multiple stages with intermediate outputs, the system reduces the cumulative delay that would occur in a single high-ratio conversion stage. Each stage processes a portion of the conversion, allowing earlier stages to begin producing output sooner, thereby reducing overall latency while achieving the target sample rate conversion.
4Loss of energy
If multistage topology with registers is used, then ripple power is reduced, but device complexity increases
Solution Approach 1:
The multistage topology segments the power consumption profile by introducing registers between stages. These registers act as boundaries that prevent ripple power from propagating through the entire filter structure, confining power variations to individual stages. While this adds structural elements, the segmentation approach systematically manages power ripple in a controlled manner.
Solution Approach 2:
The registers between stages serve as intermediary elements that decouple the power consumption of adjacent stages. By inserting these buffer registers, the system mediates the power ripple transmission, allowing each stage to operate with reduced sensitivity to power variations from neighboring stages, thereby reducing overall ripple power effects.
Data Source
AI summary
Systems and methods for low power lattice wave filters include an input operable to receive a digital input signal having a first sample rate, a first processing branch including a first delay element operable to receive the digital input signal and output a delayed digital input signal, a second processing branch including a first adder operable to receive the digital input signal and subtract a delayed feedback signal to produce a difference signal, a second adder operable to combine the delayed digital input signal and the difference signal to produce an output signal, and wherein the second processing branch further includes a feedback path including a second delay element operable to receive the output signal and output the delayed feedback signal. In a multistage topology, a register is disposed between each stage and clocked to reduce ripple power.