Launch-off-shift Scan Test Circuit for IC Sensors
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Solution Overview
Problem
As digital semiconductor IC geometries shrink and signal speeds increase, fault testing becomes more challenging due to complex test sequences that existing test hardware struggles to handle, particularly with larger and more complex integrated circuits.
Innovation Solution
An integrated circuit sensor with a test program generator that receives a scan vector including a test mode signal and a launch-off-capture test sequence, generating a launch-off-capture test signal and a launch-off-shift test signal using a built-in self-test circuit, which allows for efficient testing of the IC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If launch-off-capture test sequences are used to test larger and more complex ICs, then fault testing coverage is improved, but test hardware complexity and difficulty of handling test sequences increase
Solution Approach 1:
The patent implements built-in self-test circuits within the IC that can autonomously generate and execute test sequences without requiring external test equipment. The test logic is integrated directly into the IC, allowing it to test itself using internal resources such as scan chains and logic elements already present in the device architecture.
Solution Approach 2:
The patent designs test circuits that can perform multiple functions: they can operate in both launch-off-capture and launch-off-shift modes, test various types of faults (delay faults, stuck-at faults), and work with different IC configurations. The same hardware infrastructure supports multiple test methodologies, reducing overall system complexity.
2Productivity
If traditional test hardware is used for increasingly larger test sequences, then existing infrastructure is maintained, but testing efficiency and productivity decrease
Solution Approach 1:
The patent divides the test sequence into multiple segments that can be executed independently and in parallel. Test vectors are broken down into smaller chunks that can be processed through segmented scan chains, allowing concurrent testing of different circuit portions and reducing overall test time.
Solution Approach 2:
The patent performs preliminary setup of test patterns and sequences before actual fault testing begins. Test data is pre-loaded into scan chains and test configurations are established in advance, allowing the actual fault detection phase to proceed more quickly without setup delays during critical measurement periods.
3Reliability
If more comprehensive test sequences are implemented to cover more faults, then testing completeness is improved, but vector count and testing cost increase
Solution Approach 1:
The patent varies test parameters such as clock frequencies, signal levels, and timing intervals to detect different types of faults with the same basic test vectors. By changing operational parameters rather than increasing vector quantity, the system achieves comprehensive fault coverage while maintaining a compact test sequence.
Solution Approach 2:
The patent maintains continuous testing operation by overlapping test phases and eliminating idle periods between test vector applications. The test sequence is designed to flow continuously through the circuit under test, maximizing the information gained from each test cycle and reducing the total number of vectors needed for complete coverage.
Data Source
AI summary
An integrated circuit sensor can have a test program generator that is configured to receive a portion of a scan vector, where the scan vector includes a test mode signal and a scan enable signal. The test program generator is configured to retrieve a launch-off-capture test sequence from the scan vector and use the launch-off-capture test sequence and the test mode signal to generate a launch-off-capture test signal. A test signal generator is configured to generate a launch-off-shift test signal using the launch-off-capture test signal and the scan enable signal. A built-in self-test circuit is configured to test the integrated circuit sensor using the launch-off-shift test signal.