Launch-on-shift support for multi-domain clocking
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Solution Overview
Problem
The complexity of integrated circuits with multiple clock domains poses challenges in performing accurate launch-on-shift scanning due to timing uncertainties caused by asynchronous clock signals, making it difficult to predict the circuit state during the capture cycle.
Innovation Solution
The method involves dividing clock domains into capture and non-capture domains, where the test vector portions for non-capture domains are shifted and allowed to settle before the last shift launch cycle and capture cycle of the capture domains, using a first clock signal from external test equipment and a second clock signal generated within the integrated circuit to eliminate timing ambiguity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If launch-on-shift scanning is performed on integrated circuits with multiple clock domains, then testing coverage is improved, but timing uncertainties arise due to asynchronous clock signals
Solution Approach 1:
The patent segments the multiple clock domains into distinct capture and non-capture domains, allowing independent control and timing management for each domain. This segmentation enables the testing system to handle asynchronous clock signals by treating each domain separately, thus resolving the timing uncertainty while maintaining comprehensive testing coverage.
Solution Approach 2:
The patent applies preliminary action by shifting test vector portions into non-capture domains before the last shift launch cycle occurs in capture domains. This advance positioning of test data allows the non-capture domains to settle their asynchronous clocking before the critical capture operation, eliminating timing ambiguities while preserving the benefits of multi-domain testing.
2Measurement precision
If test vector portions are shifted into non-capture domains before the last shift launch cycle, then timing ambiguity is eliminated, but the number of shifting operations increases
Solution Approach 1:
The test vector is segmented into distinct portions for capture domains and non-capture domains, with each portion shifted according to its specific timing requirements. This segmentation allows the system to manage the increased number of shifting operations in an organized manner, maintaining timing precision while avoiding unnecessary complexity through systematic organization.
Solution Approach 2:
The patent performs preliminary shifting of test vector portions into non-capture domains before the critical last shift launch cycle. This preliminary action consolidates the shifting operations into a structured sequence, reducing timing ambiguity while the systematic approach to multi-phase shifting prevents exponential growth in operational complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures accurate testing by eliminating timing uncertainties between clock domains, allowing for simultaneous testing of multiple capture clock domains and reducing the number of test vectors required, thereby detecting errors that might not be found with single-domain testing.
Implementation Method 1
a second clock signal from a phase locked loop to shift an ending subset of the first portion of the test vector into the first capture clock domain scan chain
Data Source
AI summary
A method to perform launch-on-shift scanning for integrated circuits having multiple clock domains is presented. An integrated circuit includes both capture clock domains and non-capture clock domains. The portions of the test vectors for non-capture clock domains are shifted into the scan chains of the non-capture clock domains and allowed to settle prior to the last shift launch cycle and the capture cycle of the capture clock domains. Thus, the ambiguity of the timing between the non-capture domains and the capture domains caused by asynchronous clock signals is eliminated.