Layer 2 Hardware Acceleration for Memory-Free Packet Processing

Solution Overview

Problem

Existing wireless communication systems face significant processing overhead and power consumption due to the CPU-based software implementation of layer 2 (MAC, RLC, and PDCP) processes, which are computation-intensive and require substantial memory access.

Innovation Solution

Implementing hardware acceleration circuitry to perform PDCP, RLC, and MAC processes without memory access, using a hardware acceleration processor to handle PDCP service data units, RLC service data units, and MAC service data units directly to generate transport blocks for the physical layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If layer 2 processes (PDCP, RLC, MAC) are implemented by software in CPU with memory access, then processing flexibility and ease of implementation are improved, but processing speed and power consumption deteriorate due to computation intensity and memory access overhead

Engineering Contradiction:

Improveease of implementationVSAvoidprocessing speed

Core Design Contradiction:

Ease of operationVSProductivity

Solution Approach 1:

The patent replaces the software-based CPU processing system with a hardware-based processing system. Specifically, it implements PDCP, RLC, and MAC layer processes using hardware circuits that directly process data without requiring memory access, thereby substituting the mechanical/software processing mechanism with a hardware-based mechanism that achieves higher processing speed and lower power consumption while maintaining processing functionality

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a hardware processing unit as an intermediary between the upper layers and physical layer. This hardware unit receives data from upper layers, performs PDCP, RLC, and MAC processing internally without memory access, and outputs processed data to the physical layer, thereby mediating the data flow and eliminating the bottleneck of memory access

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If layer 2 processes are implemented by software in CPU with memory access, then processing flexibility is improved, but power consumption increases due to significant processing overhead

Engineering Contradiction:

Improveprocessing flexibilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the software-based CPU processing system with a hardware-based processing system. Specifically, it implements PDCP, RLC, and MAC layer processes using hardware circuits that directly process data without requiring memory access, thereby substituting the mechanical/software processing mechanism with a hardware-based mechanism that achieves higher processing speed and lower power consumption while maintaining processing functionality

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent extracts the layer 2 processing functions (PDCP, RLC, MAC) from the general-purpose CPU software environment and isolates them into a dedicated hardware processing unit. This extraction allows the processing to occur without memory access overhead, reducing power consumption while maintaining the necessary processing flexibility through hardware implementation

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS20250379926A1Method and device for speeding up packet processing

Publication Date: 2025.12.11 MEDIATEK INC

AI summary

A method for speeding up packet processing is provided. The method is implemented by a hardware acceleration circuitry of a computing device and includes receiving uplink packets from an upper layer. The method includes performing a MAC process on the downlink TB to obtain MAC SDUs. The method includes performing a PDCP process on PDCP SDUs corresponding to the uplink packets to obtain PDCP PDUs. The method includes perform an RLC process on RLC SDUs corresponding to the PDCP PDUs to obtain RLC PDUs. The method includes performing a MAC process on MAC SDUs corresponding to the RLC PDUs to obtain a TB. The method includes transmitting the TB to a PHY layer.