Layered Error Correction Stopping Criteria for Lower Power ECC
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Solution Overview
Problem
Existing error correction methods in semiconductor memory devices face challenges in balancing powerful error correction with constraints on latency, throughput, and power consumption, particularly in portable electronic devices.
Innovation Solution
Implementing a stopping criterion for layered iterative error correction by parity checking on a layer-by-layer basis and stopping the iterative process when a particular layer's parity check is correct, thereby transferring the codeword to an algebraic error correction circuit for further processing, which reduces power consumption without increasing codeword failure rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by performing error correction only on the necessary number of layers and iterations rather than always executing the full complement. The system dynamically adjusts the error correction process based on actual error conditions, stopping early when errors are corrected or when further correction is deemed unnecessary, thus reducing power consumption while maintaining adequate error correction capability.
Solution Approach 2:
The error correction process is segmented into multiple layers and iterations that can be independently controlled. Each layer and iteration represents a discrete segment of the overall error correction task, allowing the system to selectively execute only the segments needed to achieve the desired correction level, thereby optimizing the balance between reliability and power consumption.
2Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but processing time increases
Solution Approach 1:
The system performs only the partial number of layers and iterations necessary to achieve adequate error correction rather than executing all planned iterations. By monitoring error correction progress and stopping early when corrections are sufficient or when further iterations are unlikely to help, the system reduces processing time while maintaining acceptable error correction performance.
Solution Approach 2:
The error correction process is made dynamic by allowing the number of layers and iterations to vary based on actual error conditions. The system adapts the correction depth in real-time, increasing iterations when errors are severe and reducing them when errors are minimal, thus optimizing the trade-off between reliability and processing time.
3Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The error correction functionality is segmented into distinct layers and iterations with clear boundaries and control points. Each segment has well-defined entry and exit conditions, making the overall complex process manageable through modular organization. This segmentation allows for easier implementation and control despite the multi-layered nature of the correction process.
Solution Approach 2:
The system incorporates feedback mechanisms that monitor the results of each error correction layer and iteration, using this information to determine whether additional correction is needed. The feedback from error detection and correction outcomes guides the control logic in deciding when to continue or stop the correction process, simplifying the overall control structure by making it responsive to actual conditions rather than requiring predetermined complex decision trees.
Data Source
AI summary
The present disclosure includes apparatuses and methods related to stopping criteria for layered iterative error correction. A number of methods can include receiving a codeword with an error correction circuit, iteratively error correcting the codeword with the error correction circuit including parity checking the codeword on a layer-by-layer basis and updating the codeword after each layer. Methods can include stopping the iterative error correction in response to a parity check being correct for a particular layer.