Embedded Semiconductor Packaging With Layered Encapsulants
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Solution Overview
Problem
Conventional semiconductor packages face issues of excess cost, decreased reliability, and large package sizes, leading to inadequate performance.
Innovation Solution
A manufacturing method for semiconductor devices involving a substrate with encapsulant and interconnects, embedded electronic components, and a cover structure, utilizing various coating and etching processes to form vias and interconnects, resulting in a compact and protected semiconductor package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor packages are used, then manufacturing process is simple, but package size is large and reliability is decreased
Solution Approach 1:
The substrate is divided into multiple regions with different encapsulants (first encapsulant and second encapsulant) that have different properties. The first encapsulant provides enhanced protection in critical areas while the second encapsulant provides standard protection elsewhere, allowing reliability improvement without requiring complete process redesign.
Solution Approach 2:
Different regions of the substrate are assigned different encapsulant materials with tailored properties. The first encapsulant is used in regions requiring enhanced reliability (such as areas with embedded components), while the second encapsulant is used in standard regions, optimizing protection where needed without unnecessary complexity elsewhere.
2Reliability
If conventional semiconductor packages are used, then manufacturing cost is low, but performance is relatively low
Solution Approach 1:
Multiple encapsulants are combined in a single package structure, allowing the benefits of high-performance materials to be integrated with cost-effective materials. This merging approach enables performance improvement without requiring complete replacement of conventional materials, thus controlling manufacturing costs.
Solution Approach 2:
The substrate is prepared with predetermined patterns and regions before encapsulation, allowing selective application of different encapsulants in advance. This preliminary structuring enables performance optimization through material selection without requiring complex post-processing steps, thereby controlling manufacturing costs.
3Volume of moving object
If conventional semiconductor packages are used, then structure is simple, but package size is large
Solution Approach 1:
The encapsulants are applied in nested or layered configurations where the first encapsulant and second encapsulant are positioned in specific regions of the substrate. This nested arrangement allows compact packaging by efficiently utilizing space and reducing overall package volume while maintaining structural integrity.
Solution Approach 2:
The encapsulation structure transitions from a single-layer conventional approach to a multi-region, multi-material approach that utilizes spatial differentiation. By organizing encapsulants in different regions and at different levels, the package size is reduced without requiring excessive complexity in any single dimension.
Data Source
AI summary
In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.