Layered Medium-Voltage Inductor Windings to Reduce Parasitic Capacitance
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Solution Overview
Problem
Medium-voltage power electronics face challenges with parasitic capacitance in inductors, leading to EMI/EMC issues and increased losses in transistors, particularly in MV SiC MOSFET applications, due to faster switching behaviors.
Innovation Solution
A conductor design featuring two windings with layered configurations and electro-magnetically connected core sections, where turns are serially connected and separated by layer spacers to reduce parasitic capacitance, utilizing magnetic permeable materials and optimized electrical connections to minimize capacitive couplings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional inductor design is used, then inductor functionality is maintained, but parasitic capacitance increases causing EMI/EMC issues and transistor losses
Solution Approach 1:
The inductor winding is divided into multiple layers with insulating spacers between them. This segmentation separates the turns that would otherwise be in direct contact, reducing the parasitic capacitance between adjacent layers while maintaining the inductive functionality of the component.
Solution Approach 2:
Insulating spacers are introduced as intermediary elements between the winding layers. These spacers act as mediators that electrically isolate adjacent layers, thereby reducing parasitic capacitance without affecting the magnetic coupling necessary for inductor operation.
2Productivity
If MV SiC MOSFETs with faster switching are used, then power loss is reduced and power density is increased, but EMI/EMC issues and transistor aging are exacerbated due to higher dv/dt
Solution Approach 1:
The winding structure is segmented into multiple layers with insulating spacers, which reduces parasitic capacitance. This allows the system to utilize faster-switching MV SiC MOSFETs for higher power density while minimizing the EMI/EMC problems that would otherwise result from the high dv/dt switching transitions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces parasitic capacitance, mitigating EMI/EMC issues and enhancing the efficiency of power converters by minimizing capacitive current during switching transitions.
Implementation Method 1
a core comprising a first core section and a second core section, said core sections being adjacent to each other and are made from a magnetic permeable material
Implementation Method 2
a first winding on the first core section, the first winding comprising a first layered configuration of turns; a second winding on the second core section, the second winding comprising a second layered configuration of turns
Data Source
AI summary
The present invention relates to inter alia to a conductor having at least two windings where each of the two windings preferably has layered configuration of turns, where each layer of a winding preferably is serially connected. Further, layers are typically distanced from each other, preferably by use of layer spacers, which preferably provide a void, or a number of voids, in between each layers. Conductors according to the present invention have shown to lessen, such as reducing parasitic capacitance.