Layered LDPC Decoder Architecture for High-Throughput Parallel Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Designing a high-throughput LDPC decoder is challenging due to the complexity of iterative message decoding algorithms and routing networks, which leads to high decoding latency and increased memory storage requirements in traditional layered decoding architectures.
Innovation Solution
Implementing a fully parallel layered decoder architecture where all layers and check node elements within each layer are processed in parallel, using a permutation matrix to determine the parallelization factor and ensure that the LDPC decoder meets the design threshold for throughput and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional layered decoding architecture is used, then decoding can be performed with moderate complexity, but decoding latency increases and throughput decreases
Solution Approach 1:
The LDPC code is divided into multiple layers, where each layer corresponds to a subset of check node elements. This segmentation allows the decoding process to be organized into parallel layers, with each layer processing independent sets of check nodes simultaneously, thereby increasing throughput while maintaining manageable complexity for each individual layer.
Solution Approach 2:
The patent employs a dynamic layered decoding approach where the processing order and grouping of check node elements are optimized based on the specific LDPC code structure. The permutation matrix is dynamically constructed to maximize parallelization opportunities, allowing the system to adapt the decoding architecture to different code rates and block lengths while maintaining high throughput.
2Productivity
If fully parallel processing is implemented, then throughput increases and latency decreases, but device complexity and memory storage requirements increase
Solution Approach 1:
By segmenting the check node elements into distinct layers based on the permutation matrix structure, the patent reduces routing complexity within each layer. Each layer processes a subset of check nodes with localized data dependencies, eliminating the need for complex global routing networks while enabling parallel processing across layers.
Solution Approach 2:
The patent introduces a layer dimension to the decoding architecture, transforming the traditional two-dimensional processing (check nodes × variable nodes) into a three-dimensional structure (layers × check nodes × variable nodes). This dimensional expansion allows parallel processing without increasing intra-layer routing complexity, as each layer operates independently with its own simplified routing structure.
3Reliability
If more memory storage is allocated per iteration, then decoding accuracy improves, but device complexity and cost increase
Solution Approach 1:
The patent segments the memory storage requirements across multiple layers, where each layer stores only the message data necessary for its specific check node processing. This segmentation reduces the peak memory storage requirement per iteration compared to storing all check node data simultaneously, while maintaining decoding accuracy through systematic message passing across layers.
Solution Approach 2:
The patent performs preliminary organization of message data before the actual decoding iteration begins. By pre-processing and structuring the incoming data according to the permutation matrix layers, the system reduces the memory storage burden during the decoding iteration itself, as data is already arranged in the optimal format for layer-by-layer processing.
Data Source
AI summary
A low-density parity-check (LDPC) decoder may receive LDPC coded data. The LDPC decoder may perform a decoding iteration associated with decoding the LDPC coded data. The decoding iteration may be performed by processing a group of layers. Each layer may include a corresponding set of check node elements, and may be processed by causing each check node element, of the set of check node elements corresponding to the layer, to update a set of variable node elements, connected to the check node element and associated with the LDPC coded data, based on a check node function associated with the check node element. The decoding iteration may be performed such that each layer is processed in parallel, and such that each check node element updates the corresponding set of variable node elements in parallel. The LDPC decoder may provide a result of performing the decoding iteration.


