Layered LDPC Decoding Schedule for Punctured Bit Reliability

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Solution Overview

Problem

Existing LDPC decoding techniques are inefficient due to serial updating of check nodes with varying degrees, leading to unreliable decoding of check nodes connected to punctured bit nodes.

Innovation Solution

Implement a scheduling order for LDPC decoding that prioritizes updating lower degree check nodes before higher degree ones, and decodes check nodes based on their degree and connection to punctured bits, using a combination of partial and full decoding iterations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If serial updating of check nodes is performed in conventional LDPC decoding, then the decoding process is simple to implement, but the decoding reliability deteriorates for check nodes connected to punctured bit nodes

Engineering Contradiction:
Improvedecoding reliabilityVSAvoiddecoding process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic scheduling of check node updates based on their degree and connection to punctured bits. The decoding process transitions from static serial updating to dynamic ordering where check nodes are updated in ascending order of their degree, with check nodes connected to punctured bits receiving special handling. This dynamic approach improves decoding reliability while maintaining manageable complexity through systematic reordering rather than complex algorithms.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the updating parameter order of check nodes from conventional serial order to degree-based order. By sorting check nodes according to their degree (number of connected bit nodes) and updating them in ascending order, the patent optimizes the flow of extrinsic information during decoding. This parameter reordering addresses the reliability issue for check nodes connected to punctured bits without requiring fundamental changes to the decoding algorithm structure.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If all check nodes are updated in each decoding iteration, then complete decoding coverage is achieved, but the computational complexity and time consumption increase

Engineering Contradiction:
Improvedecoding efficiencyVSAvoiddecoding time consumption
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the check nodes into different groups based on their degree and connection to punctured bits. By dividing check nodes into segments (e.g., check nodes connected to punctured bits versus those not connected, and further by degree groups), the patent enables selective and prioritized updating. This segmentation allows the decoder to focus computational resources on critical check nodes first, improving decoding efficiency while reducing overall time consumption through staged processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary sorting and categorization of check nodes before the decoding iterations begin. By pre-organizing check nodes in ascending order of their degree and identifying which ones are connected to punctured bits, the patent prepares an optimal updating sequence in advance. This preliminary action eliminates the need for complex real-time decisions during decoding iterations, thereby improving productivity while minimizing time loss through efficient pre-planning.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If check nodes connected to punctured bit nodes are updated with the same reliability as other check nodes, then the decoding process is uniform and simple, but the decoding accuracy deteriorates

Engineering Contradiction:
Improvedecoding accuracyVSAvoidupdating process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality differentiation by treating check nodes connected to punctured bits differently from other check nodes. Specifically, check nodes connected to punctured bits are identified and assigned higher priority in the updating sequence due to their reduced reliability. This local differentiation ensures that these vulnerable check nodes receive updated extrinsic information earlier in the decoding process, improving decoding accuracy without requiring complex adaptive algorithms throughout the entire system.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs a simple yet effective strategy of reordering check node updates based on readily available information (degree and punctured bit connection status). Rather than implementing complex adaptive algorithms that continuously adjust updating strategies, the patent uses a static but optimized ordering scheme that is computationally inexpensive to maintain. This approach achieves high decoding accuracy through simple, disposable ordering information rather than complex persistent control mechanisms.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentEP3776870B1Scheduling for layered decoding of low-density parity-check (LDPC) codes
Publication Date: 2025.04.16 QUALCOMM INC
  • EP3776870B1 patent drawingFigure 1
  • EP3776870B1 patent drawingFigure 2
  • EP3776870B1 patent drawingFigure 3

AI summary

Methods, systems, and devices for wireless communications are described. Efficient low-density parity-check (LDPC) scheduling of layered decoding may include receiving a message encoded as an LDPC code that includes a number of check nodes and a number of bit nodes, applying a first number of decoding iterations to decoding the message, applying a second number of decoding iterations to decoding the message after the first number of decoding iterations are applied, and decoding the message through completion of both the first number of decoding iterations and the second number of decoding iterations. In some cases, only a portion of the number of check nodes is decoded during each of the first number of decoding iterations (partial decoding) and all of the number of check nodes are decoded during each of the second number of decoding iterations. The scheduling order may be based on the check node degree (starting with the lowest degree) or on a number of punctured bit nodes connected to the check nodes.