Layered Memory Protocol for Separating Debugging and Data Commands

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Solution Overview

Problem

Existing memory systems face challenges in efficiently transferring debugging information without degrading or delaying data input/output operations, leading to performance issues.

Innovation Solution

A memory system with a layered structure and protocol for distinguishing between data input/output and debugging information, using multiple queues and access points to manage command processing, including a controller with service layers for parsing and managing commands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If debugging information transfer is performed using the same data structure and protocol as data input/output, then the memory system structure remains simple, but data input/output performance degrades due to interference between debugging operations and data operations

Engineering Contradiction:
Improvememory system structureVSAvoiddata input/output performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the command processing system into multiple independent queues: a first queue for data input/output commands and a second queue for debugging information commands. This segmentation allows debugging operations to be processed separately from data operations, preventing performance degradation while maintaining a relatively simple overall structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary parsing layer that distinguishes between data commands and debugging commands before they are processed. This intermediary mechanism routes different types of commands to appropriate queues, enabling simultaneous operation without interference while adding minimal complexity to the system architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple queues and access points are introduced to separate data and debugging operations, then data input/output performance is maintained, but device complexity increases

Engineering Contradiction:
Improvedata input/output performanceVSAvoidcommand processing structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the command processing function into segmented queues, with each queue handling specific command types. This segmentation enables parallel processing of data and debugging operations, maintaining high productivity while organizing complexity into manageable, functional modules rather than a monolithic structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a dimensional separation by introducing multiple access points (first access point for data commands, second access point for debugging commands) that operate independently. This dimensional approach allows simultaneous command processing without interference, managing complexity through structural organization rather than computational complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If a unified command processing approach is used for both data and debugging operations, then the system is easier to implement, but debugging information transfer interferes with data operations

Engineering Contradiction:
Improvesystem implementationVSAvoidoperation independence
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent implements segmentation at the queue level, creating separate processing paths for data and debugging operations. This maintains ease of implementation through modular design while ensuring operation independence, as each queue processes its commands without interfering with the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary parsing and routing mechanism that maintains a unified command interface while separating processing paths. This intermediary layer preserves ease of implementation through a consistent command structure while ensuring reliability through independent processing of data and debugging operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4629049A1Memory system including data structure and protocol for transferring debugging information
Publication Date: 2025.10.08 SK HYNIX INC
  • EP4629049A1 patent drawingFigure 1
  • EP4629049A1 patent drawingFigure 2
  • EP4629049A1 patent drawingFigure 3

AI summary

A memory system includes at least one memory device; and a controller coupled to the at least one memory device. The controller has a layered structure including plural service layers and including at least one component configured to provide communication between the plural service layers. An uppermost layer among the plural service layers parses whether a command input from an external device is related to data input and output or debugging information, and send, based on a parsing result, the command to a next layer among the plural service layers via one of multiple access points corresponding to multiple queues.