Layered Oxide Semiconductor TFT for High Mobility and Reliability

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Solution Overview

Problem

Conventional oxide semiconductor TFTs face challenges in increasing channel mobility while maintaining reliability, as higher mobility materials are prone to deterioration due to moisture and hydrogen ingress, leading to decreased resistance and operational defects.

Innovation Solution

A semiconductor device with a layered structure comprising a lower oxide semiconductor layer with In, Ga, Zn, and Sn, and an upper oxide semiconductor layer with In and Ga, where the lower layer has a thickness of 20 nm or less and an atomic ratio of Sn 5% or more, and the upper layer has no Sn or a lower Sn ratio, along with a specific angle configuration to enhance protection film coverage and reduce moisture ingress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a high mobility oxide semiconductor material is used in the oxide semiconductor layer, then the TFT mobility is improved, but the reliability deteriorates due to increased susceptibility to moisture and hydrogen ingress

Engineering Contradiction:
ImproveTFT mobilityVSAvoidresistance stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The invention uses a composite structure consisting of an oxide semiconductor layer containing high mobility material (In-Ga-Zn-Sn-O-based semiconductor) and a protective layer (nitride film or oxide nitride film). This composite structure allows the underlying high mobility material to provide excellent TFT mobility while the protective overlaying layer prevents moisture and hydrogen from reaching and degrading the semiconductor layer, thus resolving the contradiction between speed and reliability

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The protective layer (nitride film or oxide nitride film) acts as an intermediary barrier between the high mobility oxide semiconductor layer and the external environment (moisture and hydrogen). This intermediary layer does not significantly impede the electrical performance while effectively blocking harmful substances, thereby maintaining both high mobility and reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the oxide semiconductor layer is exposed to the environment, then the manufacturing process is simplified, but moisture and hydrogen enter the layer causing deterioration

Engineering Contradiction:
Improveprocess simplicityVSAvoidcharacteristic stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The protective layer (nitride film or oxide nitride film) is formed in advance during the manufacturing process to cover and protect the oxide semiconductor layer before the device is fully assembled and sealed. This preliminary protective action ensures that the semiconductor layer is pre-protected against moisture and hydrogen ingress, maintaining reliability while keeping the overall process efficient

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11205729B2Semiconductor device and method for manufacturing same
Publication Date: 2021.12.21 SHARP KK
  • US11205729B2 patent drawing
  • US11205729B2 patent drawing
  • US11205729B2 patent drawing

AI summary

A semiconductor device includes a thin film transistor, wherein: a semiconductor layer of the thin film transistor has a layered structure including a lower oxide semiconductor layer including In, Ga, Zn and Sn and an upper oxide semiconductor layer arranged on the lower oxide semiconductor layer and including In, Ga and Zn; a thickness of the lower oxide semiconductor layer is 20 nm or less; an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer is 5% or more; the upper oxide semiconductor layer includes no Sn, or an atomic ratio of Sn with respect to all metal elements of the upper oxide semiconductor layer is smaller than an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer; and a first angle θ1 between a side surface and a lower surface of the lower oxide semiconductor layer is smaller than a second angle θ2 between a side surface and a lower surface of the upper oxide semiconductor layer.