Layered Power Supply Lines for Display Voltage Drop and Parasitic Capacitance
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Solution Overview
Problem
Existing display apparatuses face challenges in maintaining uniform luminance and preventing parasitic capacitance, which can lead to irregular image quality and voltage drops in power supply lines, especially in high-resolution and large-size displays.
Innovation Solution
The display apparatus incorporates a layered structure with lower and upper power supply lines, where the upper power supply lines are electrically connected to the lower power supply lines at multiple points, and an insulating inorganic layer is used to prevent parasitic capacitance, ensuring uniform signal distribution and minimizing voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If power supply lines are extended to cover large display areas, then power supply coverage is improved, but voltage drops increase
Solution Approach 1:
The power supply system is divided into multiple segments: lower power supply lines (ELVDD1, ELVDD2) and upper power supply lines (ELVDD3, ELVDD4) operating at different voltage levels. This segmentation allows power to be distributed in stages, reducing the voltage drop across any single line while covering large display areas.
Solution Approach 2:
The patent introduces a vertical dimension by stacking power supply lines at different heights (lower and upper layers). This three-dimensional power supply network reduces the effective path length and resistance in the horizontal plane, thereby minimizing voltage drops while maintaining comprehensive coverage.
2Manufacturing precision
If circuit units are densely arranged for high resolution, then display resolution is improved, but parasitic capacitance increases
Solution Approach 1:
An insulating layer is introduced as an intermediary between the lower and upper power supply lines. This insulating layer effectively isolates adjacent conductive elements, reducing parasitic capacitance between closely spaced circuit units while maintaining the dense arrangement required for high resolution.
Solution Approach 2:
The patent connects multiple power supply lines to maintain the same voltage potential across different regions. By ensuring equipotential conditions through proper grounding and voltage reference connections, parasitic capacitance effects are minimized as potential differences between adjacent elements are reduced.
3Device complexity
If power supply lines are placed close together for compact design, then device compactness is improved, but parasitic capacitance between lines increases
Solution Approach 1:
Instead of placing power supply lines close together in the same plane, the patent utilizes the vertical dimension by arranging them in stacked layers (lower and upper power supply lines). This three-dimensional arrangement maintains compactness while increasing the effective distance between conductive elements through the insulating layer, thereby reducing parasitic capacitance.
Solution Approach 2:
An insulating layer is positioned between the lower and upper power supply lines to act as an electrical intermediary. This insulating barrier reduces the electric field coupling between adjacent power supply lines, effectively minimizing parasitic capacitance while allowing the lines to be placed in close proximity for compact design.
Data Source
AI summary
A display apparatus including a plurality of pixel electrodes, a plurality of circuit units in one-to-one correspondence with the plurality of pixel electrodes, respectively, each of the plurality of circuit units being electrically connected to a corresponding one of the plurality of pixel electrodes, a plurality of lower power supply lines extending in one direction so as to be electrically connected to some circuit units from among the plurality of circuit units, the some circuit units being along the one direction, and a plurality of upper power supply lines extending in the one direction, the upper power supply lines being over the plurality of lower power supply lines, and electrically connected to the plurality of lower power supply lines.


