Layered Epitaxial Source/Drain Regions for Lower Resistance

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Solution Overview

Problem

As semiconductor devices continue to shrink in size, the integration density of electronic components increases, but this leads to challenges such as increased resistance in epitaxial source/drain regions, which affects device performance.

Innovation Solution

The use of epitaxially grown source/drain regions with seed layers that have a lower bottom-up growth rate, allowing for increased volume and reduced resistance, and the growth of highly-doped epitaxial layers to improve device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but resistance in epitaxial source/drain regions increases

Engineering Contradiction:
Improveintegration densityVSAvoidresistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The source/drain structure is segmented into multiple epitaxial layers with different doping concentrations and materials. The first epitaxial layer has lower doping concentration while the second epitaxial layer has higher doping concentration, creating a graded structure that reduces overall resistance while maintaining compatibility with scaled device dimensions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite epitaxial structures combining different semiconductor materials (e.g., SiGe and Si) with varying germanium concentrations. This composite approach allows optimization of both electrical properties (lower resistance) and structural properties (lattice matching) to support higher integration density

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If epitaxial source/drain regions are used to improve device performance, then manufacturing is simplified, but resistance increases due to lower doping concentration

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidresistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The epitaxial source/drain region is divided into multiple layers with progressively increasing doping concentrations. The first layer provides a lightly-doped region for manufacturability, while the second layer provides a heavily-doped region for low resistance, achieving both ease of manufacture and low resistance through layered structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the doping concentration parameter across different epitaxial layers, transitioning from lower doping concentration in the first layer to higher doping concentration in the second layer. This parameter gradient allows the structure to achieve both manufacturability and low resistance properties

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach decreases the resistance of the epitaxial source/drain regions, enhancing the performance of semiconductor devices by increasing the volume available for highly-doped epitaxial layers and reducing dopant diffusion into channel regions.

Implementation Method 1

growing first epitaxial layers from a sidewall of the nanostructure and a top surface of the fin in the source/drain recess; growing a second epitaxial layer from the first epitaxial layers

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12080759B2Transistor source/drain regions and methods of forming the same
Publication Date: 2024.09.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12080759B2 patent drawing
  • US12080759B2 patent drawing
  • US12080759B2 patent drawing

AI summary

In an embodiment, a device includes: a nanostructure; and a source/drain region adjoining a channel region of the nanostructure, the source/drain region including: a first epitaxial layer on a sidewall of the nanostructure, the first epitaxial layer including a germanium-free semiconductor material and a p-type dopant; a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including a germanium-containing semiconductor material and the p-type dopant; and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer including the germanium-containing semiconductor material and the p-type dopant.