Layered TFT Gate Electrode Structure to Prevent Insulator Cracks

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Solution Overview

Problem

In flexible display devices, the high stress generated by refractory metal wiring lines can cause cracks in the gate insulating film, leading to reduced production yield and reliability, and increasing the film thickness to reduce wiring line resistance exacerbates this issue.

Innovation Solution

A method involving a thin film transistor layer with a semiconductor layer, a gate insulating film, and a layered gate layer formed by alternating deposition and etching of first and second metal films, where the second metal layer protrudes from the first metal layer to cover it, reducing stress and cracking while maintaining low wiring line resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the film thickness of the metal film formed of refractory metal is increased to reduce wiring line resistance, then the wiring line resistance is reduced, but the stress generated in the metal film increases causing cracks in the gate insulating film

Engineering Contradiction:
Improvewiring line resistanceVSAvoidcrack in gate insulating film
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The gate electrode is divided into multiple metal films with different thicknesses. The first metal film has a smaller thickness than the second metal film, allowing the total thickness to be sufficient for low resistance while distributing stress across layers to prevent cracking of the gate insulating film.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the gate electrode structure have different metal film thicknesses optimized for their specific functions. The first metal film region has smaller thickness to reduce stress on the gate insulating film, while the second metal film region has larger thickness to provide low resistance conduction path.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If refractory metal wiring lines are formed to achieve flexibility, then the display device gains flexibility, but high stress generated by the metal film causes cracks in the gate insulating film reducing production yield

Engineering Contradiction:
ImproveflexibilityVSAvoidproduction yield
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The gate electrode is segmented into multiple metal films with different thicknesses. This segmentation allows the structure to maintain flexibility while distributing mechanical stress across layers, preventing crack propagation that would reduce production yield.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate electrode uses a composite structure of multiple metal films with different properties. This composite approach combines the flexibility needed for flexible displays with stress management capabilities to prevent gate insulating film cracking and maintain high production yield.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses cracks in the gate insulating film and reduces wiring line resistance without increasing stress, enhancing the reliability and yield of flexible display devices.

Implementation Method 1

a first metal film deposition step of depositing a first metal film to cover the gate insulating film

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

a second metal film deposition step of forming a second metal film to cover the first metal layer exposed by peeling the first resist pattern

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS12089444B2Display device and method for manufacturing same
Publication Date: 2024.09.10 SHARP KK
  • US12089444B2 patent drawing
  • US12089444B2 patent drawing
  • US12089444B2 patent drawing

AI summary

In a TFT layer forming step, first, a semiconductor layer on a resin substrate is formed by performing a semiconductor layer forming step, and subsequently a gate insulating film is formed to cover the semiconductor layer by performing a gate insulating film forming step, and then a first metal layer is formed by performing a first metal film deposition step, a first photo step, and a first etching step, and a second metal layer is formed by performing a second metal film deposition step, a second photo step, and a second etching step, thereby forming a gate layer in which the first metal layer and the second metal layer are layered.