Layered Conductive Via Structure for Low-Resistance IC Interconnects
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Solution Overview
Problem
As integrated circuit devices are downscaled, achieving excellent electrical connection characteristics within a small device area is challenging due to the limitations of conventional methods for forming contacts and wires.
Innovation Solution
The integrated circuit device incorporates a substrate with a cell transistor, a contact electrically connected to the transistor, a conductive via with a via conductive layer and a via skin layer, an interlayer insulation layer, and a wiring line that includes a bottom barrier line and a main conductive line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used for forming contacts and wires, then manufacturing process is simpler, but electrical connection characteristics deteriorate in downscaled devices
Solution Approach 1:
The conductive via is segmented into multiple functional layers: a via conductive layer for electrical connection and a via skin layer for surface protection and oxidation prevention. The wiring line is segmented into a bottom barrier line and a main conductive line, with each layer serving distinct functions in the electrical connection structure.
Solution Approach 2:
The patent employs composite material structures where different materials are combined to achieve superior electrical connection characteristics. The via conductive layer and via skin layer use different materials optimized for各自的 functions, similarly the bottom barrier line and main conductive line form a composite structure that balances electrical performance and structural integrity.
2Area of stationary object
If device area is reduced for downsaling, then integration density improves, but electrical connection characteristics worsen
Solution Approach 1:
The patent transitions from planar two-dimensional wiring to three-dimensional vertical stacking with multiple conductive layers. The via structure extends vertically with skin and conductive layers, and the wiring line incorporates bottom barrier and main conductive lines in different vertical positions, utilizing the third dimension to maintain connection quality while reducing footprint area.
Solution Approach 2:
The conductive via structure embeds the via skin layer within and around the via conductive layer, creating a nested configuration. Similarly, the bottom barrier line and main conductive line are nested in a vertical arrangement, with the barrier line positioned beneath the main conductive line, maximizing space utilization in the vertical dimension.
3Ease of manufacture
If conventional wire structure is used, then manufacturing is easier, but electrical resistance increases
Solution Approach 1:
The wiring line is divided into a bottom barrier line and a main conductive line, with each segment optimized for specific functions. The bottom barrier line provides structural support and oxidation resistance, while the main conductive line optimizes electrical conductivity, thereby reducing overall electrical resistance while maintaining ease of manufacture through standardized layering processes.
Solution Approach 2:
The composite structure of bottom barrier line and main conductive line combines materials with different properties to achieve low electrical resistance. The barrier line material provides oxidation resistance and structural integrity, while the main conductive line material maximizes electrical conductivity, resulting in a wiring structure with superior electrical performance compared to conventional single-layer wires.
Data Source
AI summary
Provided is an integrated circuit device. The integrated circuit device includes a substrate, a cell transistor disposed on a substrate, a contact electrically connected to the cell transistor, a conductive via disposed on the contact and including a via conductive layer disposed on a top surface of the contact and a via skin layer covering a top surface of the via conductive layer, a first interlayer insulation layer surrounding a portion of a sidewall of the conductive via, and a wiring line disposed on the interlayer insulation layer, extending in a first horizontal direction, contacting a top surface of the conductive via, and including a bottom barrier line and a main conductive line disposed on the bottom barrier line.