Layout Correction Method for DRAM Optical Proximity

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Solution Overview

Problem

Inaccurate optical proximity correction during the layout expansion of Dynamic Random Access Memory (DRAM) arrays due to neglecting optical diameter in smaller-size layout areas leads to non-uniform Critical Dimension (CD) and photoresist profile fluctuations, affecting product yield.

Innovation Solution

A method involving providing an initial layout, expanding it based on optical diameter considerations, correcting the expanded layout through reconstruction and inversion photoetching technology to achieve a uniform critical dimension, and obtaining a target layout that ensures reliable Optical Proximity Correction (OPC).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a smaller-size layout area is selected for correction to save time, then correction time is reduced, but optical proximity correction accuracy deteriorates due to neglecting optical diameter effects

Engineering Contradiction:
Improvecorrection timeVSAvoidoptical proximity correction accuracy
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by expanding the layout area before performing optical proximity correction. This pre-expansion ensures that the correction process includes sufficient margin to account for optical diameter effects, thereby maintaining correction accuracy while still improving efficiency compared to traditional full-area correction methods.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If layout area is expanded into a larger array area, then optical proximity correction accuracy is improved, but correction complexity increases

Engineering Contradiction:
Improveoptical proximity correction accuracyVSAvoidcorrection process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the layout correction process into distinct stages: first expanding the layout area to account for optical effects, then performing the correction process. This segmentation allows the system to handle the expanded area systematically, reducing the perceived complexity by breaking down the correction task into manageable steps.

Inventive Principle:
Principle #1Segmentation

3Speed

If smaller-size layout area is used for correction, then processing speed is improved, but critical dimension uniformity deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoidcritical dimension uniformity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing layout expansion before correction. This pre-expansion ensures that the correction process operates on an enlarged area that accounts for optical diameter effects, thereby achieving both improved processing speed (compared to traditional full-area correction) and maintained critical dimension uniformity through proper optical effect consideration.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12078924B2Layout correction method
Publication Date: 2024.09.03 CHANGXIN MEMORY TECH INC
  • US12078924B2 patent drawing
  • US12078924B2 patent drawing
  • US12078924B2 patent drawing

AI summary

A layout correction method is provided. The layout correction method includes: providing an initial layout; expanding the initial layout to obtain an expanded layout; correcting the expanded layout to obtain a corrected layout; and obtaining a target layout based on the corrected layout.