Semiconductor Layout Cut Pattern Placement with Pre-Completion Design Rule Checking
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Solution Overview
Problem
Existing design rule checking methods for semiconductor layouts often identify violations after the layout is completed, leading to a large number of corrections needed for non-circular and cyclic groups, which can result in consequential design rule violations.
Innovation Solution
Implementing pre-completion checking to prevent violations of design rules related to non-circular and cyclic groups by temporarily preventing the placement of cut patterns in locations that would trigger rule violations, and making necessary corrections before the layout is finalized.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If post-completion checking is used to identify design rule violations, then the layout can be completed without interruptions, but a large number of corrections are needed after completion
Solution Approach 1:
The patent implements pre-completion checking that performs design rule verification before the layout is finalized. This preliminary action identifies and corrects violations of design rules related to non-circular and cyclic groups while patterns are still being placed, preventing the need for extensive post-completion corrections and reducing overall correction time.
2Ease of manufacture
If design rule checking is performed after layout completion, then the layout generation process is simple, but many consequential design rule violations occur
Solution Approach 1:
The system performs design rule checking during the layout generation process itself, before completion. This preliminary verification ensures design rule compliance is maintained throughout the process, preventing consequential violations while keeping the generation process straightforward.
Solution Approach 2:
The patent implements feedback mechanisms that continuously monitor design rule compliance during pattern placement. When violations are detected, the system provides immediate feedback to correct the placement, ensuring reliability is maintained throughout the generation process rather than being checked only at the end.
3Productivity
If cut patterns are placed without pre-checking for design rule violations, then the placement process is fast, but violations of design rules related to non-circular and cyclic groups occur
Solution Approach 1:
The system performs preliminary checks for design rule violations related to non-circular and cyclic groups before finalizing the placement of cut patterns. This allows the placement process to remain efficient while ensuring manufacturing precision and adherence to design rules are maintained.
Data Source
AI summary
A method (of generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks, the layout diagram being stored on a non-transitory computer-readable medium) includes: placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer; determining whether the first candidate location results in a group of cut patterns which violates a design rule; and temporarily preventing placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule.