Multiple-Patterning Layout Grids for Trim Mask DRC
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Solution Overview
Problem
Conventional design rule checking and physical design implementation tools face challenges in efficiently handling trim mask rules, especially at advanced technology nodes like 10-nm, due to their global and directional nature, leading to long search times and inefficiencies in multiple-patterning aware correct-by-construction routing solutions.
Innovation Solution
The implementation of multiple sets of grids in a physical design, based on various design rules, allows for correct-by-construction layout processing, transforming global trim mask rules into local problems, enabling efficient routing and design rule checking independent of the total number of shapes in the design, using a light-weight data structure that facilitates constant time operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional design rule checking is used to check trim mask rules, then design rule checking can be performed, but the search time increases proportionally to log(n) where n is the total number of shapes in the layout
Solution Approach 1:
The patent segments the layout into multiple local regions or windows, and performs design rule checking independently in each region. This segmentation transforms the global O(log n) search problem into multiple local O(1) search problems, significantly reducing total checking time while maintaining completeness through systematic region coverage
Solution Approach 2:
The patent introduces a spatial indexing dimension by organizing shapes into a grid-based or hierarchical spatial structure. This allows the DRC system to quickly locate and check only relevant shapes in local regions without searching the entire layout, achieving constant-time local checks independent of total shape count
2Manufacturing precision
If multiple core masks are used in multiple-patterning approaches, then half-pitch sizes can be achieved, but alignment or overlay issues arise between the multiple core masks
Solution Approach 1:
The patent introduces self-aligned spacer structures as intermediaries between the core mask and trim mask. These spacers are formed by conformal deposition on the core mask features, automatically establishing precise positional relationships and eliminating alignment issues between masks while enabling the required half-pitch dimensions
Solution Approach 2:
The self-aligned double patterning process uses the core mask features themselves to define the position of the spacers and subsequently the trim mask features. The process is self-aligning because each subsequent feature automatically positions itself relative to the previous feature through the spacer formation mechanism, eliminating the need for separate alignment operations
3Reliability
If trim mask rules are applied globally, then design rules can be enforced, but the global nature of the rules poses significant difficulties in physical design implementation tools
Solution Approach 1:
The patent segments the global trim mask rule checking into local region-based checks. By dividing the layout into manageable windows and applying trim mask rules locally to each window, the implementation complexity is reduced from handling global rules across the entire design to simpler local rule applications, while maintaining overall rule enforcement through systematic region coverage
Data Source
AI summary
Disclosed are methods, systems, and articles of manufactures for implementing multiple-patterning-aware correct-by-construction layout processing for an electronic design by identifying rules for a first layer and for second layer(s) adjacent to the first layer, determining one or more sets of grids based on the rules, extending or implementing shapes to terminate at some grids of the one or more sets of grids, and populating the data of the ends of the shapes in the first layer in a data structure. The one or more sets of grids are in direction(s) perpendicular to the routing direction(s) of the first layer and have one or more grid pitches determined based at least in part upon routing pitch(es) of the second layer(s) and rule(s) for vias.