Semiconductor Layout OPC Reuse for Duplicate Pattern Regions
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Solution Overview
Problem
The increasing complexity and integration density of semiconductor devices lead to optical proximity effects during photolithography, resulting in distorted photoresist patterns and potential malfunctions in electronic devices.
Innovation Solution
A method of manufacturing semiconductor devices that involves designing the device using a computer-readable medium, performing photolithography on a substrate based on a designed layout, and applying optical proximity correction (OPC) operations to correct for optical proximity effects, ensuring accurate pattern formation on the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the complexity and integration density of semiconductor devices are increased to satisfy technical requirements, then high performance and multiple functions are achieved, but optical proximity effects occur during photolithography causing distorted photoresist patterns
Solution Approach 1:
The patent applies optical proximity correction (OPC) operations during the design phase to pre-correct the layout patterns before manufacturing. By performing OPC on the actual layout and storing correction results, the method proactively compensates for optical proximity effects that will occur during photolithography, thereby maintaining pattern formation accuracy despite increased device complexity and integration density
2Manufacturing precision
If conventional OPC operations are performed on entire actual layouts, then pattern formation accuracy is improved, but the time required for OPC operation increases significantly
Solution Approach 1:
The patent segments the actual layout into multiple regions and identifies duplicate pattern regions. Instead of performing OPC on the entire layout, it performs OPC only on representative patterns from each duplicate region and reuses these correction results for all duplicate instances. This segmentation strategy maintains pattern formation accuracy while significantly reducing the overall OPC operation time
Solution Approach 2:
The patent creates and stores OPC correction results from representative patterns as reusable templates. When duplicate pattern regions are detected in the actual layout, the method copies and applies the pre-computed OPC results from representative patterns to all duplicate instances, avoiding redundant OPC calculations and thereby reducing processing time while maintaining correction accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the accuracy of pattern formation on semiconductor substrates, reduces the time required for the OPC operation, and enhances the reliability and yield of semiconductor device manufacturing by effectively addressing optical proximity effects.
Implementation Method 1
performing a photolithography process on a first substrate based on a designed result... forming a first photoresist pattern on the first substrate using a first photomask
Data Source
AI summary
A method of manufacturing a semiconductor device is disclosed. The method includes generating a first virtual layout by placing and routing standard cells using a virtual netlist, searching first duplicate pattern regions in the first virtual layout and choosing one of them as a first representative pattern region, performing an OPC operation on the first representative pattern region to obtain a first OPC result, generating an actual layout by placing and routing standard cells using an actual netlist, performing an OPC operation on the actual layout, and forming a photoresist pattern on a substrate using a photomask manufactured based on the actual layout, to which the OPC operation is applied.