Lazy Memory Page Transmission for SMP Checkpointing

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Solution Overview

Problem

Fast and frequent checkpointing is challenging for symmetric multiprocessing (SMP) virtual machines, as deterministic replay is inefficient, limiting fault tolerance to single processor virtual machines.

Innovation Solution

Implementing a 'lazy' transmission method where modified memory pages of a virtual computing instance are copied to a memory region on the first host computer during a checkpoint interval and then transmitted to a second host computer after the instance resumes execution, allowing for efficient incremental and continuous checkpointing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional checkpointing is used for SMP virtual machines, then fault tolerance can be provided, but deterministic replay is inefficient and complex

Engineering Contradiction:
Improvefault toleranceVSAvoiddeterministic replay complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the checkpointing process into two distinct phases: a quick snapshot phase that captures the VM state with minimal disruption, and a deferred memory page transmission phase that occurs after the VM resumes. This segmentation eliminates the need for complex deterministic replay during the checkpointing process itself, while still providing fault tolerance through the snapshot capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by capturing the VM snapshot and identifying modified memory pages before the VM resumes execution. The actual transmission of these memory pages is deferred to a later time when the VM is running normally, thus preparing the checkpoint data in advance without requiring complex replay mechanisms during the critical checkpoint moment.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If frequent checkpointing is implemented, then fault tolerance and recovery capability are improved, but system performance and execution time are reduced

Engineering Contradiction:
Improverecovery capabilityVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent enables continuous useful action by allowing the VM to resume execution immediately after the snapshot is taken, without waiting for memory page transmission to complete. The transmission of modified memory pages occurs in the background while the VM continues to run, ensuring that the checkpointing process does not interrupt the continuity of useful computational work.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent rushes through the checkpointing operation by quickly capturing the essential VM state snapshot and immediately resuming execution. The detailed memory page transmission is skipped or deferred to a non-critical time period, allowing the checkpointing process to complete its essential function rapidly while maintaining system performance.

Inventive Principle:
Principle #21Skipping (Rushing through)

3Manufacturing precision

If all modified memory pages are transmitted immediately during checkpointing, then checkpoint accuracy is ensured, but transmission time and system overhead increase

Engineering Contradiction:
Improvecheckpoint accuracyVSAvoidtransmission time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent extracts only the essential checkpoint information (the snapshot and list of modified memory pages) and transmits it immediately to ensure checkpoint accuracy. The actual transmission of the memory page contents is separated out and performed later in the background, thus ensuring accuracy while minimizing the time impact on system performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by transmitting only the metadata and snapshot information immediately for checkpoint accuracy, while deferring the transmission of actual memory page contents. This partial transmission approach ensures the checkpoint is accurate and usable while avoiding the excessive transmission time that would result from sending all memory pages immediately.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10095583B2Lazy transmission of memory pages during checkpointing
Publication Date: 2018.10.09 VMWARE INC
  • US10095583B2 patent drawing
  • US10095583B2 patent drawing
  • US10095583B2 patent drawing

AI summary

During checkpointing of a virtual computing instance running in a first host computer, memory pages that have been modified during a checkpoint time interval are lazily transmitted from the first host computer to a second, backup, host computer. The lazy transmission technique includes the steps of stunning the virtual computing instance at the end of the time interval, and after said stunning, (i) detecting at the first host computer the memory pages that have been modified during the time interval, and (ii) copying one or more of the modified memory pages to a memory region in the first host computer. Then, after the virtual computing instance resumes execution, i.e., while the virtual computing instance is running in the first host computer, the copied memory pages are transmitted from the memory region in the first host computer to the second host computer.