LBD Abstract Model for Formal Verification Efficiency
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Solution Overview
Problem
As digital circuit designs become increasingly complex, existing verification methods, including simulation-based and formal verification, face challenges in effectively covering important corner cases, and abstraction-refinement techniques can be computationally expensive, necessitating improved efficiency in formal verification tools.
Innovation Solution
The method involves constructing an abstract model with a lower-bound-distance (LBD) that includes state variables at a distance of k or less from a property, allowing for the determination of whether a counter-example exists, and if so, skipping reachability analysis, thereby improving the performance of formal verification tools by determining when to avoid computationally expensive reachability analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If abstraction-refinement is used for formal verification, then verification accuracy is improved, but computational cost increases
Solution Approach 1:
The patent performs preliminary actions by computing lower-bound-distance values and constructing LBD abstract models before executing the main verification process. This preliminary structuring of the verification space based on distance metrics allows the system to identify and skip unnecessary reachability analyses, thereby reducing overall computational cost while maintaining verification accuracy through systematic exploration of the state space.
2Ease of operation
If random input stimuli are used for simulation-based verification, then implementation is simple, but coverage of important corner cases decreases
Solution Approach 1:
The patent introduces LBD abstract models as an intermediary between simple random simulation and exhaustive formal verification. These abstract models serve as a mediator that guides the selection of input stimuli by identifying promising regions in the state space based on distance metrics, thereby improving corner case coverage without requiring complete enumeration of all possible inputs.
3Reliability
If formal verification is performed without optimization, then verification thoroughness is ensured, but verification time increases
Solution Approach 1:
The patent segments the verification process into distinct phases: constructing LBD abstract models, computing lower-bound-distance values, and performing targeted reachability analyses only on promising regions. This segmentation divides the exhaustive verification task into manageable segments that can be executed efficiently, reducing overall verification time while maintaining thoroughness through systematic coverage of critical state spaces.
Data Source
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AI summary
Embodiments of the present invention provide methods and apparatuses for verifying the functionality of a circuit. The system can determine a lower-bound-distance (LBD) value, such that the LBD value is associated with an LBD abstract model of the CUV which does not satisfy a property. The system can use an abstraction-refinement technique to determine whether the CUV satisfies the property. The system can determine an upper-bound-distance value for an abstract model which is being used in the abstraction-refinement technique, and can determine whether the LBD value is greater than or equal to the upper-bound-distance value. If so, the system can conclude that the abstract model does not satisfy the property, and hence, the system can decide not to perform reachability analysis on the abstract model that is currently being used in the abstraction-refinement technique.