LBIST Controller Interleaving Scan Chains to Reduce Power
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Solution Overview
Problem
Conventional Logic Built-In Self Test (LBIST) methods face challenges with high power consumption and di/dt noise, leading to unreliable results and increased testing time, while reducing scan load or rate compromises defect coverage and reliability.
Innovation Solution
The implementation of a system and method that uses a plurality of control signal sets provided by an LBIST controller to LBIST satellite modules, interleaving scan operations across these modules to manage power dissipation and di/dt noise, thereby reducing testing time and improving correlation with functional characterization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the LBIST scan rate is slowed to reduce di/dt, then di/dt noise is reduced, but overall test time increases
Solution Approach 1:
The patent divides the LBIST scan operation into multiple segments by partitioning the scan chains into groups and assigning different scan rates to each group. This segmentation allows the system to reduce di/dt noise in some segments while maintaining faster scan rates in others, thereby reducing overall test time compared to uniformly slowing down the entire scan operation.
Solution Approach 2:
The patent implements dynamic scan rate adjustment by varying the scan rate across different scan chains or time periods based on power and di/dt constraints. The LBIST controller dynamically selects scan rates for different scan chain groups, allowing the system to adaptively balance between noise reduction and test efficiency rather than using a fixed slow scan rate throughout.
2Power
If the scan load is reduced or scanning is performed with less-random data, then LBIST power and di/dt are reduced, but transition (AC) coverage decreases
Solution Approach 1:
The patent partitions scan chains into multiple groups and applies different scanning strategies to each group. Some groups are scanned with reduced load or less-random data to reduce power and di/dt, while other groups maintain full scan load and random data to preserve AC coverage. This segmented approach allows the system to reduce overall power consumption without sacrificing total defect coverage.
Solution Approach 2:
The patent applies different scanning characteristics to different scan chain groups based on local requirements. Critical scan chains that require high AC coverage are scanned with full random data and appropriate load, while non-critical scan chains use reduced scanning approaches. This local differentiation allows power reduction in specific areas without compromising overall test quality.
3Reliability
If full-chip LBIST scan is performed at high transistor count, then comprehensive defect coverage is achieved, but power consumption exceeds tolerable levels
Solution Approach 1:
The patent divides the full-chip scan operation into multiple scan chain groups that are scanned in different cycles with different scan rates. This segmentation allows comprehensive defect coverage across the entire chip while limiting the number of active scan chains at any given time, thereby controlling instantaneous power consumption to remain within tolerable levels.
Solution Approach 2:
The patent implements periodic scanning of different scan chain groups in a round-robin fashion, where each group is scanned for a limited number of cycles before switching to the next group. This periodic action distributes the power consumption over time, preventing sustained high power levels while ensuring all scan chains receive comprehensive testing coverage across multiple periods.
Data Source
AI summary
A method for improved Logic Built-In Self-Test (LBIST) includes providing a plurality of control signal sets, by an LBIST controller, to an LBIST domain comprising a plurality of LBIST satellite modules. Each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves the LBIST channel scan and LBIST sequence operations for each of the LBIST satellite modules, through the plurality of control signal sets.A test system includes a Logic Built-In Self-Test (LBIST) domain comprising a plurality of LBIST satellite modules. An LBIST controller couples to the LBIST domain and provides a plurality of control signal sets to the LBIST domain, wherein each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves LBIST channel scan operations for each of the LBIST satellite modules, through the plurality of control signal sets.