Microcontroller for Reusable LBIST Testing
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Solution Overview
Problem
Current At Speed Logic Built In Self Test (LBIST) solutions require custom designs for each chip, which are labor-intensive, time-consuming, and not reusable, necessitating intimate knowledge of the design and engineering expertise.
Innovation Solution
A microcontroller-based LBIST solution that utilizes programmable hardware description language files and storage elements like ROM or RAM, along with clock gating latches, to enable at-speed structural testing of chips, allowing for reusable designs and reduced labor and time in delivering LBIST solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If custom LBIST designs are created for each chip, then testing accuracy and reliability are improved, but development time and labor intensity increase significantly
Solution Approach 1:
The patent implements a universal LBIST controller design that can be applied across multiple chip designs. The controller uses programmable logic and standardized interfaces to adapt to different chip architectures without requiring custom design for each chip, thereby reducing development time while maintaining testing reliability through configuration flexibility.
Solution Approach 2:
The LBIST controller utilizes programmable parameters and configurable logic that can be adjusted through software or configuration bits. This allows the same hardware controller to adapt to different chip designs by changing operational parameters, test patterns, and control sequences, eliminating the need for custom hardware design while preserving testing accuracy.
2Measurement precision
If custom LBIST designs are created for each chip, then testing precision is improved, but design complexity and engineering expertise requirements increase
Solution Approach 1:
The patent employs a standardized LBIST controller template that can be copied and instantiated across different chip designs. This template includes pre-designed logic for test pattern generation, response capture, and fault detection, which maintains testing precision while reducing design complexity by eliminating the need to recreate control logic for each chip.
Solution Approach 2:
The LBIST controller acts as an intermediary layer between the test infrastructure and the chip under test. It provides standardized interfaces and abstraction that simplify the integration process, allowing precise testing without requiring deep engagement with chip-specific design details, thereby reducing the engineering expertise burden.
3Productivity
If reusable LBIST designs are implemented, then productivity and efficiency are improved, but adaptability to unique design requirements may be reduced
Solution Approach 1:
The LBIST controller is designed with dynamic reconfigurability, allowing it to adapt its behavior based on the specific chip design being tested. Configuration registers, programmable logic, and selectable test modes enable the same hardware controller to dynamically adjust to different design requirements while maintaining high productivity through reuse of the core controller architecture.
Data Source
AI summary
Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store a uniquely defined set of input and output signals to enable a logic BIST, and a plurality of latches adapted to store a plurality of values corresponding to a behavioral profile of a test clock.