LBR Stack Call Stack Mode for Low-Overhead Performance Monitoring

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In multiprocessor systems, synchronizing data among software threads and diagnosing performance bottlenecks is challenging due to lock contention and the complexity of existing debugging methodologies, which can lead to performance impacts and errors.

Innovation Solution

A processor performance monitoring circuitry uses a last branch record (LBR) storage unit to provide an unobtrusive and platform-independent method for obtaining an exact call stack to performance monitoring events, allowing for efficient call stack recording and analysis without the overhead of conventional call stacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional instrumentation or intrusive methodologies are used to output call stacks to a function of interest, then call stack information can be obtained, but the system suffers from complexity, intrusiveness, and performance overhead

Engineering Contradiction:
Improvecall stack information accuracyVSAvoiddebugging methodology complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary call stack information (return addresses) into a dedicated return address stack data structure, separating this specific debugging need from the complex conventional instrumentation methodologies. This extraction approach obtains precise call stack information while avoiding the complexity and intrusiveness of full instrumentation frameworks.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a simplified copy of call stack information by recording only return addresses in a return address stack, rather than implementing full conventional call stack instrumentation. This copying approach provides sufficient debugging information with reduced complexity and overhead compared to complete instrumentation methodologies.

Inventive Principle:
Principle #26Copying

2Reliability

If locks are used to guarantee mutual exclusion across simultaneous accesses to shared data in multiprocessor systems, then data synchronization is achieved, but system performance deteriorates due to lock contention

Engineering Contradiction:
Improvedata synchronizationVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables the performance monitoring unit and return address stack to self-record call stack information automatically during normal processor operation without requiring external instrumentation or locking mechanisms. This self-service approach captures debugging information while maintaining system performance by avoiding lock contention entirely.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the operational parameters of the processor by utilizing existing performance monitoring unit capabilities and adding a return address stack, allowing call stack information to be captured through parameter changes rather than through locking mechanisms. This approach maintains data synchronization reliability while improving system productivity by avoiding lock overhead.

Inventive Principle:
Principle #35Parameter changes

3Power

If the number of software threads is increased to utilize more processor cores, then processing power and computation ability improve, but difficulties arise in synchronizing shared data and managing thread coordination

Engineering Contradiction:
Improveprocessing powerVSAvoidthread synchronization complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent makes the performance monitoring unit multi-functional by enabling it to simultaneously perform its original performance monitoring role and capture call stack information through the return address stack. This universal approach supports multi-threaded processing without adding synchronization complexity, as the return address stack automatically captures call information for all threads independently.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10261792B2Method and apparatus for obtaining a call stack to an event of interest and analyzing the same
Publication Date: 2019.04.16 INTEL CORP
  • US10261792B2 patent drawing
  • US10261792B2 patent drawing
  • US10261792B2 patent drawing

AI summary

In one embodiment, a processor includes a performance monitor including a last branch record (LBR) stack to store a call stack to an event of interest, where the call stack is collected responsive to a trigger for the event. The processor further includes logic to control the LBR stack to operate in a call stack mode such that an entry to a call instruction for a leaf function is cleared on return from the leaf function. Other embodiments are described and claimed.