Two-Stage LC Clock Filter for Harmonic Interference Control
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Solution Overview
Problem
In portable consumer electronic devices, the proximity of camera modules and radio communications circuitry leads to interference from harmonic components of the clock signal, affecting radio communication due to radiation noise and frequency overlap.
Innovation Solution
A passive filter circuit using a combination of inductors and capacitors is employed to attenuate undesired frequency components in the clock signal, specifically designed to reduce resonant frequency without degrading the rise time of the signal, utilizing a first and second LC stage with inductors L1, L2, and L3, and capacitors C1 and C2 to provide a rolled-off frequency response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a passive filter circuit is used to attenuate harmonic components, then radio communication interference is reduced, but the rise time of the clock signal may be degraded
Solution Approach 1:
The patent adjusts the electrical parameters (inductance and capacitance values) of the filter components to optimize the frequency response. By carefully selecting L1, L2, L3, C1, and C2 values, the filter achieves deep attenuation of harmonic components while preserving the rise time characteristics of the clock signal through parameter optimization rather than structural changes.
Solution Approach 2:
The filter design creates a dynamic frequency response that selectively attenuates different frequency components. The rolled-off frequency response dynamically passes low-frequency clock signals while blocking high-frequency harmonics, achieving adaptive filtering behavior that protects radio communication without degrading signal integrity.
2Volume of moving object
If the camera module and radio communications circuitry are arranged in close proximity to reduce device size, then device compactness is improved, but interference between clock signal harmonics and radio frequencies increases
Solution Approach 1:
The passive filter circuit acts as an intermediary component placed between the camera module's clock signal path and the radio communications circuitry. This mediator selectively removes harmful harmonic frequencies from the clock signal before they can interfere with radio communications, enabling close proximity arrangement without interference.
Solution Approach 2:
The filter extracts and removes the harmful harmonic components from the clock signal while leaving the fundamental clock frequency intact. By taking out only the interfering frequency components (20-1000 MHz range), the system maintains compact layout while eliminating frequency interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively attenuates harmonic components by at least 20 dB without significantly impacting the rise time of the clock signal, ensuring minimal interference with radio communications while maintaining fast signal transmission.
Implementation Method 1
A passive filter circuit may be used to attenuate an undesired frequency component in a clock signal
Implementation Method 2
The passive filter circuit includes a first stage that is to receive the clock signal and a second stage that is coupled to an output of the first stage. The first stage includes a first inductor and a first branch that is coupled to an output of the first inductor
Data Source
AI summary
A passive filter circuit filters an input signal to attenuate an undesired frequency. The passive filter circuit includes a first stage and a second stage. The input to the first stage is the input signal. The first stage includes a first inductor and a first branch coupled to the output of the first inductor. The first branch includes a first capacitor and a second inductor. The first stage is coupled to the second stage. The second stage includes a third inductor and a second branch coupled to the output of the third inductor. The second branch includes a second capacitor. Other embodiments are also described and claimed.