LC Clock Multiplier with Subharmonic Injection Phase Correction
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Solution Overview
Problem
Existing clock circuitry designs face challenges in generating high-frequency clock signals with accurate phase and duty cycle control, leading to transmission and detection errors in communication and radar systems, due to phase errors and varying amplitudes caused by subharmonic injection and harmonic filter noise.
Innovation Solution
The implementation of clock multiplier circuitry, injection multiplication circuitry, duty cycle correction circuitry, and duty cycle estimation circuitry to reduce phase errors by compensating LC circuitry with current sources, adjusting duty cycles, and correcting rising and falling edges of clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If subharmonic injection is used to generate high-frequency clock signals, then the clock signal frequency is multiplied, but phase errors and amplitude variations are introduced
Solution Approach 1:
The patent employs feedback mechanisms where the injected current is controlled based on the detected amplitude and phase of the oscillating signal. The circuit continuously monitors the LC oscillator output and adjusts the injection current parameters to compensate for phase errors and maintain signal integrity during frequency multiplication
Solution Approach 2:
The patent dynamically adjusts injection current parameters (amplitude, phase, timing) based on the operating conditions and detected signal characteristics. By changing these parameters in response to measured phase errors and amplitude variations, the system maintains reliable phase accuracy while achieving high-frequency multiplication
2Productivity
If LC circuitry is driven with subharmonic injection to achieve high-frequency multiplication, then transmission speed increases, but phase errors and harmonics increase
Solution Approach 1:
The patent converts the potentially harmful phase errors and harmonics generated by subharmonic injection into useful information for control. By detecting these deviations and using them to adjust the injection current parameters, the system transforms the harmful effects into the basis for automatic correction and optimization
Solution Approach 2:
The patent introduces intermediary control circuitry that mediates between the subharmonic injection source and the LC oscillator. This intermediary layer processes the injected signal, adjusts its parameters, and coordinates the injection timing to minimize harmful phase errors and harmonics while maintaining high-frequency multiplication
3Speed
If duty cycle variations occur in clock signals from frequency multiplication, then frequency multiplication is achieved, but signal accuracy deteriorates
Solution Approach 1:
The patent employs periodic sampling and correction of the clock signal duty cycle during the frequency multiplication process. By periodically measuring duty cycle variations and applying corrective injection pulses at appropriate intervals, the system maintains signal accuracy while achieving the desired frequency multiplication factor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces phase errors and harmonics in clock signals, enhancing the accuracy of transmitted signals in communication and radar systems by stabilizing duty cycles and resonant frequencies.
Implementation Method 1
modify a resonant frequency of the injection multiplication circuitry by supplying the injection current
Data Source
AI summary
An example apparatus includes: first current source circuitry having a terminal; a first transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the first transistor coupled to the terminal of the first current source circuitry, the control terminal of the first transistor coupled to the terminal of the first frequency multiplier circuitry; second current source circuitry having a terminal; a second transistor having a first terminal and a second terminal, the first terminal of the second transistor coupled to the terminal of the second current source circuitry; an inductor having a first terminal and a second terminal; a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the first terminal of the inductor; and an amplifier having a terminal coupled to the second terminal of the first transistor, the second terminal of the second transistor.