LC Composite Component with Nested Capacitor for Inductance

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Solution Overview

Problem

Conventional LC composite components face challenges in achieving desired inductance without increasing coil configuration, as the magnetic field near the coil reduces inductance due to the presence of electrode patterns, making it difficult to produce downsized components.

Innovation Solution

The LC composite component incorporates a multi-layer substrate with a pattern coil and a chip capacitive element, where the chip capacitive element is placed within the pattern coil, utilizing a dielectric body with higher relative permittivity than the insulating layers, and the counter electrodes are arranged parallel to the stacking direction to minimize magnetic flux interference, allowing for downsizing while maintaining inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the chip capacitive element is disposed away from the pattern coil to prevent inductance reduction, then the inductance is maintained, but the area of the multi-layer substrate must be increased

Engineering Contradiction:

ImproveinductanceVSAvoidarea of multi-layer substrate

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The chip capacitive element is disposed within the pattern coil, nesting one component inside the space occupied by the other. This allows the capacitor to be positioned in the magnetic field region without requiring additional substrate area, resolving the contradiction between maintaining inductance and reducing substrate size.

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

The invention utilizes the vertical stacking dimension of the multi-layer substrate to accommodate both the pattern coil and chip capacitive element in close proximity. By arranging layers vertically, the components can be positioned to minimize magnetic flux interference while maintaining compact overall dimensions.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the chip capacitive element is disposed within the pattern coil to downsize the component, then the area is reduced, but the inductance is reduced due to magnetic flux blockage

Engineering Contradiction:

Improvearea of multi-layer substrateVSAvoidinductance

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The dielectric body of the chip capacitive element is designed with higher relative permittivity than the insulating layers, concentrating the electric field within the capacitor and reducing magnetic flux interaction. This local material property optimization allows the capacitor to be positioned within the coil without significant inductance loss.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The counter electrodes are arranged asymmetrically with respect to the magnetic flux direction, with the electrode surfaces oriented parallel to the stacking direction rather than perpendicular. This asymmetric orientation minimizes the cross-sectional area blocking magnetic flux while maintaining capacitance functionality.

Inventive Principle:

Principle #4Asymmetry

3Area of stationary object

If the electrode pattern is placed near the coil to reduce substrate area, then the downsizing is achieved, but the inductance is reduced due to magnetic flux traveling around the electrode pattern

Engineering Contradiction:

Improvearea of multi-layer substrateVSAvoidinductance

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The invention accepts that the chip capacitive element will be within the magnetic field region, but converts the potential harm of magnetic flux blockage into a benefit by using high relative permittivity dielectric material. This concentrates the electric field and minimizes magnetic interaction, allowing close positioning without inductance penalty.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables the reduction of the chip capacitive element's size, decreases magnetic flux blockage, and prevents inductance reduction, allowing for easy achievement of desired inductance in a compact form factor.

Implementation Method 1

a dielectric body having a relative permittivity higher than that of the insulating layers

Methodology Applied

Scientific EffectDielectric permittivity: Dielectric Permittivity

Implementation Method 2

a pattern coil forming a coiled shape of which the coil axis extends along a stacking direction of the multi-layer substrate

Methodology Applied

Scientific EffectMagnetic field generation: Magnetic Field

Implementation Method 3

a direction of magnetic flux within the pattern coil substantially matches the stacking direction of the multi-layer substrate

Methodology Applied

Scientific EffectMagnetic flux: Magnetic Field

Data Source

PatentUS9960746B2LC composite component

Publication Date: 2018.05.01 MURATA MFG CO LTD

AI summary

Provided is an LC composite component having a multi-layer substrate, a pattern coil, and a chip capacitive element. The multi-layer substrate is configured such that insulating layers are stacked. The pattern coil forms a coiled shape of which the coil axis extends along a stacking direction of the multi-layer substrate, and includes a coil conductor disposed between the insulating layers. The chip capacitive element includes a ceramic body having a relative permittivity higher than that of the insulating layers and counter electrodes. The chip capacitive element is at least partially disposed within the pattern coil.