Liquid Crystal Control Circuit Timing Synchronization

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Solution Overview

Problem

Existing liquid crystal control circuits face challenges in synchronizing the timing of VCOM and image data signals, leading to potential conflicts and unnatural movement in displayed images due to asynchronous signal inversion and prolonged CPU processing times.

Innovation Solution

A liquid crystal control circuit with a time measurement circuit, calculator, determination circuit, and inversion unit that calculates and manages the start timing of the rewriting signal and polarity inversion to avoid conflicts between data transmission and signal inversion, allowing for asynchronous signal handling without CPU interruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the transmission period is included in the transmission standby period, then the image signal is not output to the liquid crystal panel until the transmission standby period is over, but the frame period becomes disordered and movement becomes unnatural

Engineering Contradiction:
Improvesignal synchronizationVSAvoidframe rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The liquid crystal control circuit determines in advance whether the transmission period overlaps with the transmission standby period, and proactively adjusts the polarity inversion timing to avoid conflict. This preliminary timing adjustment ensures that image data can be transmitted without waiting for the standby period to end, maintaining natural frame timing and smooth motion display.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the CPU uses a timer circuit to set transmission timing and issues transmission commands, then data transmission timing is controlled, but CPU interrupt processing occurs and processing time is prolonged

Engineering Contradiction:
Improvetiming precisionVSAvoidCPU processing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The liquid crystal control circuit is equipped with an autonomous timing control unit that independently manages the timing of image data transmission and polarity inversion. This self-service capability allows the circuit to operate without requiring CPU interrupt processing for timing control, thereby reducing CPU workload and avoiding processing time delays while maintaining precise timing synchronization.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If the CPU is occupied with processing, then other processing is temporarily stopped, but processing completion is delayed

Engineering Contradiction:
ImproveCPU control capabilityVSAvoidprocessing throughput
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The control system is segmented into two independent parts: the CPU for high-level control and decision-making, and the liquid crystal control circuit's timing control unit for autonomous timing management. This segmentation allows the CPU to remain free for other processing tasks while the timing control unit handles timing-critical operations independently, thereby improving overall processing throughput without sacrificing control capability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11295686B2Liquid crystal control circuit, electronic timepiece, and liquid crystal control method
Publication Date: 2022.04.05 CASIO COMPUTER CO LTD
  • US11295686B2 patent drawing
  • US11295686B2 patent drawing
  • US11295686B2 patent drawing

AI summary

A liquid crystal control circuit includes: a first terminal that outputs a rewriting signal for rewriting a plurality of pixels; a second terminal that periodically designates a start timing of the rewriting signal; a third terminal that outputs a polarity signal for designating polarity of AC voltage; a first circuit that identifies a next second inversion timing of any first inversion timing at which the polarity is inverted; a calculator that calculates a first start timing after the first inversion timing based on the start timing; a second circuit that determines whether the second inversion timing is within a period from a predetermined time before the first start timing to the first start timing; and an inversion unit that inverts polarity of the polarity signal after the rewriting signal starting from the first start timing is stopped, when the second inversion timing is within the period.