LC Oscillator Kick-Start Circuit for Low Startup Latency
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Solution Overview
Problem
Digital isolators face challenges in reducing startup latency for pulse communication systems, which affects system power, delay, and speed, particularly in applications like digital isolation and wireless communication.
Innovation Solution
An oscillator design incorporating an LC resonator with a PMOS transistor and active kick start circuit, where the PMOS transistor's drain is connected through a resistance significantly larger than the tank impedance, and an attenuation capacitance, to initiate a pulse signal with reduced startup latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a conventional oscillator startup circuit is used, then the circuit structure is simple, but the startup latency is large (5 ns)
Solution Approach 1:
The patent applies preliminary action by pre-charging the attenuation capacitance through the PMOS transistor before the oscillator needs to start. The kick-start pulse temporarily activates the PMOS transistor to charge the capacitance, creating a pre-conditioned state that enables faster oscillator startup. This pre-action reduces the startup latency from 5 ns to 2 ns by having the energy ready in advance rather than building it up during the startup process.
Solution Approach 2:
The patent uses an intermediary element (the attenuation capacitance with parallel resistance) between the power supply and the LC resonator. This intermediary circuit acts as a buffer that can be rapidly activated by the kick-start pulse to provide the necessary energy to the oscillator core, mediating between the power supply and the oscillator to achieve faster startup without directly coupling the power supply to the resonator.
2Speed
If the resistance R is made smaller to reduce startup latency, then the startup speed improves, but the steady-state oscillation quality deteriorates
Solution Approach 1:
The patent applies dynamics by making the resistance value time-dependent through the kick-start control mechanism. During startup, the PMOS transistor is temporarily activated to provide a low-resistance path for rapid charging, enabling fast startup. Once startup is complete, the transistor turns off and the resistance returns to its high value, preventing interference with steady-state oscillation. This dynamic switching of resistance values allows the system to optimize for speed during startup and for stability during normal operation.
Solution Approach 2:
The kick-start pulse provides periodic or pulsed activation of the PMOS transistor rather than continuous conduction. This periodic action allows the circuit to benefit from low resistance during the brief startup phase while maintaining high resistance during the steady-state phase, thus achieving both fast startup and good oscillation quality without the trade-off that would exist with a fixed resistance value.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The active kick start circuit reduces startup latency from 5 ns to 2 ns, enhancing pulse communication efficiency by shortening the startup period and maintaining steady-state oscillation quality.
Implementation Method 1
an attenuation capacitance connected to the drain, in parallel with the resistance R
Implementation Method 2
a drain connected through a resistance R to the Vp node, where R is significantly larger than the tank impedance
Implementation Method 3
an LC resonator including an inductance L, and a capacitance C, and having a tank impedance
Implementation Method 4
an LC resonator including an inductance L, and a capacitance C
Data Source
AI summary
An oscillator for use in pulse communication of pulse signals with a startup latency and a pulse oscillation signal (such as for use in a transmitter for OOK pulse communication with pulse modulation). The oscillator includes an LC resonator having a tank impedance, and including a high-side node (Vp), and a low-side node Vn, and having a tank voltage corresponding to [Vp-Vn]. A pulse startup circuit, includes a PMOS transistor with a source connected to a supply voltage VDD, and a drain connected through a resistance R to the Vp node (where R is significantly larger than the tank impedance), and connected to an attenuation capacitance, in parallel with the resistance R. The PMOS control terminal is coupled to receive a kick start pulse to initiate a pulse signal. the oscillator can include high-side and low-side pulse startup circuits.


