LC Oscillator Realignment Circuit for Phase Noise Suppression
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Solution Overview
Problem
LC oscillators in digital phase locked loop circuits exhibit poor phase noise performance, especially in modern advanced processes with small feature sizes, and conventional solutions lead to larger device sizes and higher power consumption.
Innovation Solution
The use of realignment techniques involving high-quality clock signals with low phase noise, converted into pulse signals to control realignment circuits coupled to the LC oscillator terminals, which align the phase and address phase noise issues without increasing device size or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional solutions are used to improve phase noise performance in LC oscillators, then phase noise performance is improved, but device size increases and power consumption increases
Solution Approach 1:
A realignment circuit is introduced as an intermediary component between the reference clock and the LC oscillator. This circuit receives a high-quality reference clock signal and generates realignment signals that are coupled to the LC oscillator terminals, thereby improving phase noise performance without requiring changes to the core oscillator structure or increasing its size
Solution Approach 2:
The patent replaces physical/mechanical approaches to improving oscillator performance (such as increasing component sizes or using more substantial hardware) with an electrical signal-based approach. By using carefully timed realignment signals derived from a reference clock, the system achieves phase noise suppression through electrical control rather than mechanical or physical enlargement of the oscillator
2Reliability
If conventional solutions are used to improve phase noise performance in LC oscillators, then phase noise performance is improved, but power consumption increases
Solution Approach 1:
The realignment circuit operates by applying periodic realignment signals to the LC oscillator at specific moments in the oscillator's cycle. These periodic impulses realign the oscillator phase with the reference clock, suppressing phase noise accumulation without requiring continuous energy input or constant intervention, thereby maintaining low power consumption
Solution Approach 2:
The patent replaces power-intensive conventional approaches with an energy-efficient electrical signal method. By using minimal-energy realignment pulses synchronized with the oscillator's natural cycle, the system achieves phase noise suppression without the continuous power demand of traditional solutions
3Reliability
If realignment circuits are added to LC oscillators, then phase noise performance is improved, but device complexity increases
Solution Approach 1:
The realignment circuit is designed to perform multiple functions: it receives the reference clock, generates appropriately timed realignment signals, and couples these signals to the LC oscillator terminals. This multi-functional design consolidates what could be multiple separate components into a single integrated circuit, minimizing the increase in device complexity while achieving phase noise suppression
Solution Approach 2:
The realignment circuit serves as a simple intermediary that bridges the reference clock and the LC oscillator. Rather than fundamentally redesigning the oscillator or adding complex control systems, this intermediary performs the essential function of phase realignment with minimal added complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses in-band noise and improves phase noise performance in LC oscillators by realigning the oscillator phase, removing accumulated jitter without adding extra electronic components, thus maintaining efficiency and reducing power consumption.
Implementation Method 1
When the first realignment signal is in the realignment state, the first transistor is turned on and a voltage of the first terminal is increased from a low level to a high level in order to align a phase of a waveform of the oscillator
Data Source
AI summary
Oscillators and methods for realignment of an oscillator are provided. An oscillator includes an inductor having first and second terminals and a capacitor electrically coupled in parallel to the inductor at the first and second terminals. A first transistor of a first conductivity type is electrically coupled to the first terminal and a voltage source. The first transistor includes a gate configured to receive a first realignment signal. When the first realignment signal is in a realignment state, the first transistor is turned on and a voltage of the first terminal is increased from a low level to a high level in order to align a phase of a waveform of the oscillator.