LC VCO Bias Switching for Low-Noise PLL Frequency Tuning
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LC resonant voltage controlled oscillators (VCOs) in phase-locked loop (PLL) circuits experience increased thermal noise due to high on-resistance transistors in the bias voltage generation circuit, which is transferred to the output terminal, thereby increasing output noise.
Innovation Solution
A voltage controlled oscillator design incorporating a switching circuit with n-channel transistors whose drain is connected via resistors to the source or drain of another transistor, allowing for controlled bias voltage changes to reduce thermal noise, featuring a second tuning circuit with a transistor that switches capacitive elements in and out of parallel connection with the inductor to tune oscillation frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a transistor is used in the coarse tuning circuit to switch capacitive elements, then the oscillation frequency tuning range is expanded, but thermal noise increases due to high on-resistance of the transistor
Solution Approach 1:
The bias voltage generation circuit is segmented into multiple independent transistor branches, each with its own bias voltage generation path. This segmentation allows each transistor to operate at lower current levels, reducing individual on-resistance and thermal noise contribution while maintaining overall tuning functionality.
Solution Approach 2:
A dedicated bias voltage generation circuit acts as an intermediary between the control signal and the transistor switching operation. This intermediary circuit provides optimized bias voltages that enable transistors to switch with lower on-resistance, thereby reducing thermal noise while maintaining the capacitive element switching function.
2Reliability
If bias voltage is applied to the transistor to prevent damage, then transistor reliability is improved, but output noise increases due to thermal noise transfer through capacitive elements
Solution Approach 1:
The bias voltage generation circuit provides locally optimized bias conditions for each transistor branch. By generating specific bias voltages tailored to each transistor's operating requirements, the circuit ensures reliable transistor operation while minimizing on-resistance and associated thermal noise generation at each local position.
Solution Approach 2:
The bias voltage generation circuit dynamically adjusts bias voltage parameters based on operating conditions. By changing bias voltage levels and current parameters, the circuit maintains transistor reliability while optimizing on-resistance characteristics to minimize thermal noise transfer to the output.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal noise by minimizing on-resistance and output noise in the VCO, as demonstrated by phase noise characteristics showing 2 to 3 dB less noise compared to conventional designs.
Implementation Method 1
a variable capacitive element connected in parallel to the inductor, and receive a first control signal and tune an oscillation frequency by changing, based on the first control signal, a capacitance value of the variable capacitive element
Implementation Method 2
a capacitive element and a first transistor whose first source or first drain is connected to the capacitive element, receive a second control signal and switch the capacitive element in and out of parallel connection with the inductor by turning on and off the first transistor based on the second control signal
Implementation Method 3
thermal noise increases with high on-resistance of transistors included in a circuit for generating the bias voltage. The thermal noise is transferred via the capacitive elements of the coarse tuning circuit to the output terminal of the VCO
Implementation Method 4
a switching circuit configured to include at least one n-channel second transistor whose second drain is connected via a resistor element to the first source or the first drain and a power and whose second source is grounded, and change a bias voltage of the second tuning circuit by turning on and off the at least one n-channel second transistor
Data Source
AI summary
A first tuning circuit tunes an oscillation frequency by changing, based on a first control signal, capacitance values of variable capacitive elements connected in parallel to an inductor. A second tuning circuit switches capacitive elements in and out of parallel connection with the inductor by turning on and off a transistor based on a second control signal, to thereby tune the oscillation frequency. A switching circuit includes n-channel transistors whose drains are connected via resistor elements to the source or drain of the transistor and a power and whose sources are grounded, and changes a bias voltage of the second tuning circuit by turning on and off the n-channel transistors based on the second control signal.