LCD Array Substrate DRD Structure Aperture Ratio
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Solution Overview
Problem
The increasing size and resolution of LCD devices lead to higher manufacturing costs due to the high number of ICs in the data driving unit, and existing solutions like the double rate driving (DRD) structure reduce operable time and aperture ratio.
Innovation Solution
The method involves forming an array substrate with a DRD structure where at least two adjacent pixels share a data line, and the first and second connection lines are formed in the data line area of empty spaces, reducing the number of ICs in the data driving unit without compromising operable time or aperture ratio by securing sufficient storage capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the number of data lines is reduced by half using DRD structure, then the number of ICs in data driving unit is reduced by half, but the operable time is shortened
Solution Approach 1:
The data driving unit is segmented into multiple data driving units, each controlling a portion of the data lines. This allows parallel operation of multiple data driving units, thereby reducing the overall operable time while maintaining a reduced number of ICs through the DRD structure.
Solution Approach 2:
The patent implements periodic scanning of data lines in groups, where data lines are activated in sequential batches rather than simultaneously. This periodic activation pattern reduces the required operable time for each individual data line while maintaining the reduced IC count through shared control.
2Manufacturing precision
If the number of gate lines is increased by two times, then the resolution is maintained, but the aperture ratio is lowered
Solution Approach 1:
The patent applies different line width specifications to different regions of the display panel. Gate lines and data lines in certain critical areas are made with optimized widths to minimize their area occupation, thereby maintaining high resolution with increased line count while preserving aperture ratio in pixel regions.
Solution Approach 2:
The patent utilizes multi-layer conductor structures where gate lines and data lines are arranged in different vertical layers. This three-dimensional arrangement allows increased line density for higher resolution without proportionally increasing the planar area occupied by conductors, thus maintaining aperture ratio.
Data Source
AI summary
An array substrate for LCD devices and a method of manufacturing the same are provided. By using a structure where an empty space is secured in a data line area as in a DRD structure in which the number of data lines is reduced by half, a capacitance is sufficiently secured by forming a sub storage capacitor in the data line area of the empty space, and thus, an area of a main storage capacitor can be reduced. Accordingly, the cost can be reduced, and moreover, an aperture ratio can be enhanced.