LCD Array Substrate Link Line Capacitance Compensation

Solution Overview

Problem

In liquid crystal display (LCD) devices, particularly in narrow bezel types, there is a challenge in uniformizing signal delay caused by resistance deviations in link lines, which degrades image quality and is difficult to address without increasing the size of the non-display region.

Innovation Solution

The solution involves an array substrate design with data and gate link lines that have varying distances from the drive ICs, and a conductive pattern overlapping these lines to form capacitors with different capacitances, which compensates for signal delay without expanding the non-display region, ensuring uniform signal delay across the LCD device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the non-display region size is increased to uniformize signal delay, then signal delay uniformity is improved, but device area is worsened

Engineering Contradiction:

Improvesignal delay uniformityVSAvoidnon-display region area

Core Design Contradiction:

Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent applies local quality by making the link lines have different widths at different locations. Specifically, link lines connected to data lines farther from the center have larger widths to compensate for their longer paths, while link lines closer to the center have smaller widths. This localized variation in geometry allows signal delay uniformization without increasing the overall non-display region area.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the geometric parameters (width) of the link lines to achieve signal delay uniformity. By adjusting the width of link lines based on their position relative to the center, the patent creates different electrical characteristics in different regions, thereby compensating for path length differences without expanding the non-display region.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If link lines are made longer to reach farther data lines, then coverage is improved, but resistance deviation is worsened

Engineering Contradiction:

Improvedata line connection coverageVSAvoidresistance uniformity

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by making the link lines have different widths at different locations. Specifically, link lines connected to data lines farther from the center have larger widths to compensate for their longer paths, while link lines closer to the center have smaller widths. This localized variation in geometry allows signal delay uniformization without increasing the overall non-display region area.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the geometric parameters (width) of the link lines to achieve signal delay uniformity. By adjusting the width of link lines based on their position relative to the center, the patent creates different electrical characteristics in different regions, thereby compensating for path length differences without expanding the non-display region.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively compensates for signal delay deviations in both data and gate link lines, maintaining image quality without enlarging the non-display region, making it suitable for narrow bezel LCD devices.

Implementation Method 1

a conductive pattern overlapping the link lines to form capacitors with different capacitances

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 2

a conductive pattern overlapping the link lines to form capacitors

Methodology Applied

Scientific EffectElectrostatic induction: Electrostatic Induction

Data Source

PatentUS9134583B2Array substrate for liquid crystal display device, liquid crystal display device and method of fabricating the same

Publication Date: 2015.09.15 LG DISPLAY CO LTD

AI summary

An array substrate for a liquid crystal display device includes a gate line on a substrate including a display region and a non-display region at a periphery of the display region; a common line on the substrate; a data drive integrated circuit in the non-display region; first and second data lines crossing the gate line to define a pixel region in the display region, the first and second data lines having a difference in a distance from the data drive integrated circuit; first and second data link lines connected to the data drive integrated circuit, the first and second data link lines respectively connected to the first and second data lines; a thin film transistor in the pixel region connected to the gate line and one of the first and second data lines; a pixel electrode in the pixel region and connected to the thin film transistor; and a first conductive pattern in the non-display region and connected to the common line such that a common voltage is applied to the first conductive pattern, the first conductive pattern overlapping the first and second data link lines to form first and second capacitors, respectively.