LCD Array Substrate Multi-Layer Metal Lines and Pixel Aperture
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing size and resolution of LCDs exacerbate the resistance-capacitance time delay (RC delay) problem, which affects signal transfer and display quality, and traditional methods to reduce RC delay, such as using copper processes or broadening conductive lines, compromise aperture ratio and brightness.
Innovation Solution
The LCD array substrate design features a structure with increased thickness of scan and data lines formed by multiple metal layers, reducing resistance without affecting pixel area size, and omits dielectric layers from pixel areas to enhance light transparency and brightness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of conductive lines is broadened to reduce resistance, then the RC delay is reduced, but the pixel area is reduced and aperture ratio decreases
Solution Approach 1:
The patent transitions from reducing resistance by broadening conductive line width (2D approach) to increasing conductive line thickness (3D approach). By adding multiple metal layers (first metal layer, second metal layer) to form thicker conductive lines, the cross-sectional area increases without expanding the planar footprint, thereby reducing resistance and RC delay while preserving pixel area and aperture ratio.
2Reliability
If the copper process is introduced to reduce resistance, then the RC delay is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent replaces the expensive and complex copper process with a more economical aluminum-based multi-layer metal process. By using aluminum or aluminum alloy materials in multiple layers instead of copper, the invention achieves comparable or better electrical performance (lower RC delay) while simplifying the manufacturing process and reducing production costs.
3Reliability
If dielectric layers are added to separate conductive lines, then electrical insulation is improved, but light transmittance decreases and brightness is reduced
Solution Approach 1:
The patent applies dielectric layers selectively only where electrical insulation is required (between adjacent conductive lines and between conductive lines and pixel electrodes) rather than uniformly across the entire display structure. By removing dielectric layers from the pixel area and applying them only in necessary insulation regions, the invention maintains electrical isolation while maximizing light transmittance and display brightness.
Data Source
AI summary
A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.