LCD Array Substrate Layer Stack for Higher Visible Transmittance
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Solution Overview
Problem
The existing array substrates in LCD display products have a low transmittance of about 77% in the visible light band, which reduces the display effect due to the film layer stack structure causing interference between refracted and reflected light, leading to coherence subtraction and decreased transmittance.
Innovation Solution
The proposed array substrate structure includes a specific stack of insulation layers and electrode layers, with silicon oxide and silicon nitride materials, optimized thicknesses, and refractive indices to enhance transmittance by altering the coherence enhancement and subtraction effects between refracted and reflected light, achieving a higher transmittance of 82.4% in the visible light band.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional film layer stack structure is used in the array substrate, then the device complexity is reduced with fewer layers, but the transmittance decreases due to coherence subtraction between refracted and reflected light
Solution Approach 1:
The third insulation layer is divided into three separate interlayer insulation layers (first, second, and third interlayer insulation layers) with different materials and thicknesses. This segmentation allows each layer to contribute differently to optical interference control, transforming a simple structure into a multi-functional optical management system that reduces coherence subtraction while maintaining manufacturing feasibility.
Solution Approach 2:
The patent employs composite material construction with silicon oxide and silicon nitride layers in specific combinations. The third insulation layer uses silicon oxide for the first and third interlayer insulation layers, while the second interlayer insulation layer uses silicon nitride. This composite approach enables precise control of refractive indices and optical path differences to minimize coherence subtraction and maximize transmittance.
2Ease of manufacture
If the film layer thicknesses are not optimized, then the manufacturing process is simpler, but the transmittance and display effect deteriorate due to suboptimal optical interference control
Solution Approach 1:
The patent specifies precise thickness parameters for each interlayer insulation layer to optimize optical performance. The first interlayer insulation layer thickness is 1,980-2,420 Å, the second is 1,260-1,540 Å, and the third is 855-1,045 Å. These parameter optimizations control the optical path difference and phase relationships to minimize coherence subtraction, achieving 82.4% transmittance while remaining compatible with standard manufacturing processes.
3Device complexity
If a simple insulation layer structure is used, then the device complexity is lower, but color differences at large view angles increase
Solution Approach 1:
The patent extends the insulation layer structure from a simple planar arrangement to a multi-layered vertical structure with varying materials and thicknesses. This dimensional complexity in the vertical direction creates controlled optical interference patterns that maintain consistent color perception across different viewing angles, effectively addressing color stability without excessive overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved array substrate structure significantly enhances transmittance, particularly in the 430-780 nm band, and reduces color differences at large view angles, resulting in a superior display effect with higher light utilization and aperture ratio.
Implementation Method 1
interference between refracted and reflected light
Implementation Method 2
interference between refracted and reflected light
Implementation Method 3
coherence subtraction and decreased transmittance
Data Source
AI summary
An array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises: a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a planarization layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B), the third insulating layer comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C), which are sequentially stacked; the first interlayer insulating layer is located on the side of the second interlayer insulating layer close to the substrate (10), the third interlayer insulating layer is located on the side of the second interlayer insulating layer away from the substrate; the material of the first interlayer insulating layer and third interlayer insulating layer comprises silicon oxide, the material of the second interlayer insulating layer comprises silicon nitride.