Bidirectional Shift Register for LCD Reverse Scanning
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Solution Overview
Problem
Existing LCD technologies face challenges in reducing production costs while maintaining the functionality of shift registers, particularly in achieving reverse scanning capabilities without increasing circuit complexity and parasitic capacitance effects.
Innovation Solution
A bidirectional shift register device is directly disposed on the LCD panel substrate, comprising N stages of shift registers with pre-charging, pull-up, and pull-down units, utilizing transistors and capacitors to manage clock signals and scan signals for both forward and reverse scanning operations, simplifying the circuit layout and reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If shift registers are relocated from scan driver IC to glass substrate, then production costs are reduced, but reverse scanning capability is lost
Solution Approach 1:
The shift register circuit is divided into multiple stages (first stage, second stage, third stage) with each stage containing pre-charging units, pull-up units, and pull-down units. This segmentation enables independent control of signal flow directions, allowing the same circuit to perform both forward scanning (first stage to second stage) and reverse scanning (second stage to first stage) operations without requiring separate circuits for each direction.
Solution Approach 2:
The circuit employs dynamic control through clock signals (first clock signal, second clock signal, third clock signal) that enable different stages to operate in different modes. The pre-charging units, pull-up units, and pull-down units are dynamically activated based on the clock signal timing, allowing the shift register to switch between forward scanning mode and reverse scanning mode, thus achieving bidirectional operation capability.
2Adaptability or versatility
If additional scan driver ICs are added to achieve reverse scanning, then reverse scanning capability is improved, but device complexity increases
Solution Approach 1:
The shift register circuit is designed as a universal bidirectional shift register that can perform both forward scanning and reverse scanning functions using the same circuit structure. The first stage shift register, second stage shift register, and third stage shift register work together to provide bidirectional signal transmission, eliminating the need for separate dedicated circuits for each scanning direction and thus reducing overall device complexity.
Solution Approach 2:
The patent merges the forward scanning function and reverse scanning function into a single integrated shift register circuit structure. The pre-charging units, pull-up units, and pull-down units across multiple stages are combined to create a unified circuit that handles both scanning directions, rather than using separate independent circuits for forward and reverse scanning operations.
3Object-affected harmful factors
If circuit structure is simplified to reduce parasitic capacitance, then signal integrity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent extracts and separates the pre-charging units, pull-up units, and pull-down units as distinct functional modules within each shift register stage. This modular extraction allows for optimized layout and routing that minimizes parasitic capacitance between different functional elements, while the standardized module design actually reduces manufacturing precision requirements compared to monolithic integrated designs.
Data Source
AI summary
An LCD and a bidirectional shift register device thereof are provided. The bidirectional shift register device of the invention is disposed on the substrate of the panel and includes multi-stages shift registers in series connection. Each stage shift register includes a pre-charging unit, a pull-up unit and a pull-down unit, in which the pre-charging unit receives a first preset clock signal and the output from a (i−1)th stage shift register or a (i+1)th stage shift register so as to thereby output a charging signal. The pull-up unit receives the charging signal and a second preset clock signal so as to thereby output a scan signal. The pull-down unit receives the second preset clock signal, a third preset clock signal and the output from the (i+2)th stage shift register or the (i−2)th stage shift register so as to decide whether or not pulling down the scan signal to a reference level.