Single-Channel Clock-Data Modulation for LCD Skew Reduction
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Solution Overview
Problem
Conventional liquid crystal display (LCD) apparatuses face issues with display quality due to skew between clock and data information in control signals, and high manufacturing costs attributed to extensive circuitry for communication.
Innovation Solution
A method and apparatus for signal modulation and demodulation using (n+1) delay clock signals for modulation and (m+1) delay clock signals for demodulation, where m is less than n, to improve display quality and reduce manufacturing costs by adjusting the number of delay clock signals, allowing for a single channel transmission and reduced circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple channels are connected between the timing controller and the gate driving circuit and data driving circuit for communication, then the display panel can be driven, but skew is generated between clock information and data information causing display quality deterioration
Solution Approach 1:
The patent combines clock information and data information into a single transmission channel by modulating both signals onto one carrier wave. This merging of multiple communication channels into one eliminates the skew problem between separate clock and data channels while reducing circuit complexity in the peripheral area.
Solution Approach 2:
The patent introduces a modulation signal as an intermediary carrier that transports both clock and data information. By using this intermediate carrier wave, the system can transmit multiple types of information through a single channel without direct interference between clock and data signals, thereby maintaining signal integrity and display quality.
2Reliability
If circuits occupy a large portion of the peripheral area for communication, then the display panel can be driven, but manufacturing costs of the display apparatus are increased
Solution Approach 1:
The patent merges multiple communication functions into a single transmission channel, reducing the amount of circuitry required in the peripheral area. By transmitting both clock and data information through one channel rather than requiring separate channels, the overall circuit area is reduced, leading to lower manufacturing costs.
Solution Approach 2:
The single transmission channel is designed to perform multiple functions: transmitting both clock information and data information. This multi-functional approach eliminates the need for dedicated separate circuits for each type of information transmission, thereby reducing the overall circuit area and manufacturing complexity.
3Reliability
If (n+1) delay clock signals are used for modulation and (m+1) delay clock signals are used for demodulation where m is less than n, then skew between clock and data information is reduced, but the number of delay clock signals in modulation is increased
Solution Approach 1:
The patent applies different numbers of delay clock signals to different parts of the communication system: using (n+1) delay signals for modulation at the transmitting end and (m+1) delay signals for demodulation at the receiving end, where m < n. This localized differentiation optimizes skew compensation at each end according to its specific requirements without unnecessarily increasing complexity throughout the entire system.
Solution Approach 2:
The patent changes the parameter of delay clock signal count between modulation and demodulation stages. By adjusting the number of delay signals from (n+1) at the transmitter to (m+1) at the receiver, the system dynamically optimizes skew compensation while managing the overall complexity of the delay signal generation.
Data Source
AI summary
A method of modulating and demodulating a signal includes modulating data information included in an input data signal provided from an external source and clock information included in an input clock signal provided from the external source into a transmission signal, using (n+1) delay clock signals generated based on the input clock signal, where n is a natural number. The transmission signal is demodulated into an output clock signal including restored clock information and an output data signal including restored data information, using (m+1) delay clock signals generated based on the clock information, where m is a natural number less than n.